Access top MB of 2MB BIOS flash on ISA

[mariano]

Posted on January 07, 2004 at 23:10

Access top MB of 2MB BIOS flash on ISA

[mariano]

Posted on December 02, 2003 at 20:15

Using STPC Vega, and have a 2MB BIOS flash on ISA. The chip select for the flash is the OR of RMTRCSS and an address decode so that it can be accessed every 4MB (other than in DRAM space, of course).

The BIOS is booting fine (which means it is accessing the top of the flash for the initial jump), but when trying to access the top 1MB for data later during POST, A20 is not set to 1. In fact, from the debugger, I can't read the top 1MB of this flash part, even with A20 enabled. I can see DRAM with A20 set to 1 or 0, but it seems like all ISA cycles have A20 set to 0.

How do I make it so that while I'm in POST, A20 will propagate to ISA correctly? (it's in BigRealMode, and A20 works correctly on the DRAM bus).

Thanks,

Mariano

[marios]

Posted on January 07, 2004 at 23:10

just a couple of things:

- are you using the LAxx lines for the address decoding?

- you use less than 16 Megs of Dram?

- or you make use of the ''memory hole'' feature?