BSPI0 help

[chankour]

Posted on March 22, 2006 at 10:26

BSPI0 help

[chankour]

Posted on March 15, 2006 at 20:42

I can't get BSPI0 to work, BSPI1 works just fine. The init routine is:

void SpiStart( void ) {

// BSPI_BSPI0Conf (ENABLE);

APB_SwResetConfig (APB1, ENABLE, BSPI0_Periph );

APB_SwResetConfig (APB1, DISABLE, BSPI0_Periph );

GPIO_Config ( GPIO0, 0x007, GPIO_AF_PP );

// APB_ClockConfig (APB1, ENABLE, BSPI1_Periph );

// APB_ClockConfig (APB2, DISABLE,I2C1_Periph );

// I2C_OnOffConfig (I2C1, DISABLE);

BSPI_Init ( BSPI0 );

BSPI_ClockDividerConfig (BSPI0, 8);

BSPI_Enable ( BSPI0, ENABLE );

BSPI_MasterEnable ( BSPI0, ENABLE );

BSPI_ClkActiveHigh ( BSPI0, ENABLE );

BSPI_ClkFEdge ( BSPI0, DISABLE );

BSPI_8bLEn ( BSPI0, ENABLE );

APB_SwResetConfig (APB1, ENABLE, BSPI1_Periph );

APB_SwResetConfig (APB1, DISABLE, BSPI1_Periph );

GPIO_Config ( GPIO0, 0x070, GPIO_AF_PP );

BSPI_Init ( BSPI1 );

BSPI_ClockDividerConfig (BSPI1, 8);

BSPI_Enable ( BSPI1, ENABLE );

BSPI_MasterEnable ( BSPI1, ENABLE );

BSPI_ClkActiveHigh ( BSPI1, ENABLE );

BSPI_ClkFEdge ( BSPI1, DISABLE );

BSPI_8bLEn ( BSPI1, ENABLE );

}

The lines commented out were tried out of desperation. I have a loop sending 0xAA (BSPI_WordSend( BSPIx, (unsigned char)0xAA );) on both BSPI0 and BSPI1. I can see the clk/data on BSPI1, but not on BSPI0, those lines idle high. All application notes/example code I came accross seem to be only using BSPI1.

Does anyone have a working initialisation code for BSPI0 or can point me to a place that has it.

Thanks.

[chankour]

Posted on March 15, 2006 at 20:55

Following up to my own post:

Setting the S0.SSN pin high seems to get me me the MOSI and SCLK signals. I am using this pin as a GPIO for other purposes and I am short on I/Os. Any way to work around this? or is this pin lost in SPI master mode?

Thanks.

[ This message was edited by: chankour on 16-03-2006 01:26 ]

[georges_emmanuel]

Posted on March 16, 2006 at 15:21

to uncomment BSPI0 config in BOOT register sounds good.

I manage to debug communication between SPI_ZERO(MASTER mode) to SPI_ONE(SLAVE mode)

and after that I just would like to test communication in the other direction. So I swap BSPI0 by BSPI1 in both Initialization and when I debug nothing seems to be send. I put scope one Sclk of BSPI1 (Master mode) and it didn't change.

I don't connect BSPI0.SS and BPI1.SS, I don't force to any level.

But If I'm right, for a MASTER spi SS pin should stay not connected.

Best regardS.

[chankour]

Posted on March 16, 2006 at 19:10

I already have BSPI_BSPI0Conf (ENABLE) commented out in the code I posted. But I did try it uncommented as well.

Now this is BSPI_BSPI0Conf():

INLINE void BSPI_BSPI0Conf(FunctionalState NewState)

{

if (NewState == ENABLE) PCU->BOOTCR |= 0x04; else PCU->BOOTCR &= ~0x04;

}

Which, as far as I can tell, when passed ''ENABLE'' would set bit 2 (i.e. SPIO_EN) to ''1'', which does exactly what RISC is suggesting. How is that different?

Now let me rephrase my question, if BSPIO0 is enabled and being used, can pin (P03/S0.SSN/I1SDA) be set to GPIO_OUT_PP ?

Is not, can it be used as S0.SSN and used to toggle the CS pin of the slave device? and how iis it done? The documentation is not very clear as to this aspect,.

Thanks.

[shangdawei1]

Posted on March 17, 2006 at 09:27

Quote:

On 16-03-2006 at 23:40, Anonymous wrote:

Now let me rephrase my question, if BSPIO0 is enabled and being used, can pin (P03/S0.SSN/I1SDA) be set to GPIO_OUT_PP ?

I use BSPI0, let P03/S0.SSN/I1SDA as IN_WP and

 

SCK/MOSI/MISO as AF_PP.

Is not, can it be used as S0.SSN and used to toggle the CS pin of the slave device?

it can not be used to select slave. it must hold '1'. if it is '0', BERR bit will set to '1'

and how iis it done? The documentation is not very clear as to this aspect,.

Thanks.

[georges_emmanuel]

Posted on March 17, 2006 at 09:59

Okay! I manage to did it.

It's quite fuzzy :-? , and i can't manage to find it in datasheet :-Y .

I've found a problem! maybe you could help me.

My goal use both BSPI is in master mode.

I've worked around Chankour troubles, that would like to use SS signal as GPIO.

First I was wondering if with all SPI.Pin setup as AF_PP both spi could work. So I setup pins as follow:

P0.0 0.MISO mode AF_PP

P0.1 0.MOSI mode AF_PP

P0.2 0.SCLK mode AF_PP

P0.3 0.SSN mode AF_PP

P0.4 1.MISO mode AF_PP

P0.5 1.MOSI mode AF_PP

P0.6 1.SCLK mode AF_PP

P0.7 1.SSN mode AF_PP

both SPI-bus were physicaly not connected, and setup as MASTER in 16bits lenght, I put scope on SCLKs signals, and try to send word.

All my investigations are tested on a Raisonance Board with STR7

-send a 16bits word on BSPI1 (no clock, and no data)

-send a 16bits word on BSPI0 (clock ok, and data sent)

i decided to measure voltage on SSs pins in this condition.

i 've noticed: BSPI1.SS = 0V

BSPI0.SS = 3.3V

i try to update GPIO0->PD register to force BSPI1.SS to high, but it was setup as AF_PP and i can't update this value.

So we can go forward, and step by step I'm sure that we will find an answer :) .

I decide to configure SSs pins in Out mode.

P0.0 0.MISO mode AF_PP

P0.1 0.MOSI mode AF_PP

P0.2 0.SCLK mode AF_PP

P0.3 0.SSN mode OUT_PP

P0.4 1.MISO mode AF_PP

P0.5 1.MOSI mode AF_PP

P0.6 1.SCLK mode AF_PP

P0.7 1.SSN mode OUT_PP

in the same conditions, both SPI not connected, and setup as MASTER 16bits lenght.

I force BSPI1.SS and BSPI0.SS at 3.3V

-send a 16bits word on BSPI1 (clock ok, and data sent)

-send a 16bits word on BSPI0 (clock ok, and data sent)

I force BSPI1.SS and BSPI0.SS at 0V

-send a 16bits word on BSPI1 (no clock, and no data)

-send a 16bits word on BSPI0 (no clock, and no data)

and now, mister ST, please could you help us. :|

________________

Attachments :

mySPI.zip : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtBu&d=%2Fa%2F0X0000000aK7%2Fi2h4TsgDP6KH2PFEkEl39YLcwPcbhY0RLDWl3yLgpxU&asPdf=false

[georges_emmanuel]

Posted on March 17, 2006 at 10:00

and now, mister ST, please could you help us. :-]

Smiley's mistake sorry.

[georges_emmanuel]

Posted on March 17, 2006 at 12:48

Here we are,

in the App.Note AN1810 STR71X BSPI COM.. with M25P10-A

it is said that with SPI in master mode only SSN pin must be driven to High level.

There is an hardware overview on page 5/8.

And now, BERR description at page 240/349 from STR71x Ref manual. get more understandable.

I'm still wondering why there's no explaination in Datasheet. And in AN1810 BERR would never appear because SSN is connected to VCC.

Have a nice w-e all.

[georges_emmanuel]

Posted on March 22, 2006 at 10:26

just setup as follow:

P0.0 0.MISO mode AF_PP ( output MasterInSlaveOut)

P0.1 0.MOSI mode AF_PP ( input MasterOutSlaveIn)

P0.2 0.SCLK mode AF_PP ( input Clock)

P0.3 0.SSN mode AF_PP (input CS)

P0.4 1.MISO mode AF_PP ( input MasterInSlaveOut)

P0.5 1.MOSI mode AF_PP ( output MasterOutSlaveIn)

P0.6 1.SCLK mode AF_PP ( output Clock)

P0.7 1.SSN mode OUT__PP ( output and force to '1' for MASTER mode, can't be use for anything else)

Best Regards.