EMI access in STR9

[Baris_DSP]

Posted on December 24, 2008 at 11:02

EMI access in STR9

Posted on May 17, 2011 at 09:57

I need to address the ext. memory (21e00000) in ST91x. I have configured the EMI as follow but still failed~ can you help me?

GPIO_InitTypeDef GPIO_InitStructure;

GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5 |GPIO_Pin_6 | GPIO_Pin_7;

GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;

GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt3;

GPIO_InitStructure.GPIO_IPInputConnected = GPIO_IPInputConnected_Disable;

GPIO_Init (GPIO5, &GPIO_InitStructure);

GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;

GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;

GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2;

GPIO_InitStructure.GPIO_IPInputConnected = GPIO_IPInputConnected_Disable;

GPIO_Init (GPIO7, &GPIO_InitStructure);

GPIO_Init (GPIO8, &GPIO_InitStructure);

GPIO_Init (GPIO9, &GPIO_InitStructure);

// those bastards. this one pin out of 24 is on a different alt bus

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;

GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt3;

GPIO_Init (GPIO7, &GPIO_InitStructure);

// configure SCU

SCU_EMIModeConfig(SCU_EMI_DEMUX);

SCU_EMIBCLKDivisorConfig(SCU_EMIBCLK_Div1); // or SCU_EMIBCLK_Div1;

SCU->GPIOEMI = 1; // enable ports 8 & 9 for EMI

GPIO_EMIConfig( ENABLE );

/* Enable EMI clock */

EMI_DeInit();

EMI_StructInit( &eMI_InitStruct );

eMI_InitStruct.EMI_Bank_MemWidth = EMI_Width_HalfWord;

eMI_InitStruct.EMI_Bank_IDCY =0x6;

eMI_InitStruct.EMI_Bank_WSTRD =0x6;

eMI_InitStruct.EMI_Bank_WSTWR =0x6;

eMI_InitStruct.EMI_Bank_WSTROEN=0x6;

eMI_InitStruct.EMI_Bank_WSTWEN=0x08;

eMI_InitStruct.EMI_Bank_MemWidth=EMI_Width_HalfWord;

EMI_Init( EMI_Bank1, &eMI_InitStruct );

[kais]

Posted on May 17, 2011 at 09:57

Hi

As I can see in your peace of code the configuration of GPIO8&9 is wrong.

Please refer to the STR9 EMI application note available on the web:

http://www.st.com/stonline/products/literature/an/14064.pdf

It contains several software examples configuring the EMI in several modes.

Kind regards,

Eris

Posted on May 17, 2011 at 09:57

Thx.. Can you give me the sample? I changed to:

SCU_APBPeriphClockConfig(__GPIO0, ENABLE);

SCU_APBPeriphClockConfig(__GPIO4, ENABLE);

SCU_APBPeriphClockConfig(__GPIO5, ENABLE);

SCU_APBPeriphClockConfig(__GPIO7, ENABLE);

SCU_APBPeriphClockConfig(__GPIO8, ENABLE);

SCU_APBPeriphClockConfig(__GPIO9, ENABLE);

//led

GPIO_DeInit(GPIO4);

GPIO_StructInit(&GPIO_InitStruct);

GPIO_InitStruct.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_7;

GPIO_InitStruct.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStruct.GPIO_Alternate = GPIO_OutputAlt1;

GPIO_Init(GPIO4, &GPIO_InitStruct);

//P5.0, 5.1

GPIO_DeInit(GPIO5);

GPIO_StructInit(&GPIO_InitStruct);

GPIO_InitStruct.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;

GPIO_InitStruct.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStruct.GPIO_Alternate = GPIO_OutputAlt1;

GPIO_Init(GPIO5, &GPIO_InitStruct);

GPIO_WriteBit(GPIO5, GPIO_Pin_0, 0);

GPIO_WriteBit(GPIO5, GPIO_Pin_1, 1);

//EMI , P0.4:cs0 P0.5:cs1

GPIO_DeInit(GPIO0);

GPIO_StructInit(&GPIO_InitStruct);

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5 |GPIO_Pin_6|GPIO_Pin_7;

GPIO_InitStruct.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStruct.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStruct.GPIO_Alternate = GPIO_OutputAlt2;

GPIO_Init(GPIO0, &GPIO_InitStruct);

//P7.0-P7.6:A16-A22; P8.0-P9.7:AD0-AD15

GPIO_DeInit(GPIO7);

GPIO_StructInit(&GPIO_InitStruct);

GPIO_InitStruct.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_All;

GPIO_InitStruct.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStruct.GPIO_Alternate = GPIO_OutputAlt2;

GPIO_Init(GPIO7, &GPIO_InitStruct);

GPIO_DeInit(GPIO8);

GPIO_StructInit(&GPIO_InitStruct);

GPIO_InitStruct.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_All;

GPIO_InitStruct.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStruct.GPIO_Alternate = GPIO_OutputAlt2;

GPIO_Init(GPIO8, &GPIO_InitStruct);

GPIO_DeInit(GPIO9);

GPIO_StructInit(&GPIO_InitStruct);

GPIO_InitStruct.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_All;

GPIO_InitStruct.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStruct.GPIO_Alternate = GPIO_OutputAlt2;

GPIO_Init(GPIO9, &GPIO_InitStruct);

//P7.7:A23

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_7;

GPIO_InitStruct.GPIO_Alternate = GPIO_OutputAlt3;

GPIO_Init(GPIO7, &GPIO_InitStruct);

SCU_EMIModeConfig(SCU_EMI_MUX);

SCU_EMIALEConfig(SCU_EMIALE_LEN2, SCU_EMIALE_POLHigh);

SCU_EMIBCLKDivisorConfig(SCU_EMIBCLK_Div2);

GPIO_EMIConfig(DISABLE);

SCU_AHBPeriphClockConfig(__EMI, ENABLE);

EMI_DeInit();

EMI_StructInit(&EMI_InitStruct);

EMI_InitStruct.EMI_Bank_MemWidth = EMI_Width_HalfWord;

EMI_InitStruct.EMI_Bank_IDCY = 0x3;// bus turnaround cycle

EMI_InitStruct.EMI_Bank_WSTROEN = 0x06; //output enable assertion delay

EMI_InitStruct.EMI_Bank_WSTRD = 0x06;// read wait state

EMI_InitStruct.EMI_Bank_WSTWEN = 0x08;// write enable assertion delay

EMI_InitStruct.EMI_Bank_WSTWR = 0x06;// write wait state

EMI_InitStruct.EMI_Bank_MemWidth = EMI_Width_HalfWord;

EMI_Init(EMI_Bank0, &EMI_InitStruct);

EMI_Init(EMI_Bank1, &EMI_InitStruct);

EMI_Init(EMI_Bank2, &EMI_InitStruct);

EMI_Init(EMI_Bank3, &EMI_InitStruct);

[lillian_200601]

Posted on May 17, 2011 at 09:57

Do you enable EMI_MEM_CLK?

SCU_AHBPeriphClockConfig(__EMI_MEM_CLK, ENABLE);

[kais]

Posted on May 17, 2011 at 09:57

Hi,

As I can understand from your peace of code you want to configure STR9 EMI in Mux mode. Well, the software of Mux_Mode_SRAM example accompanied with the AN2647

Can be a good demonstration for you (Please find it attached).

You have only to modify the chip select GPIO configuration since you are using GPIO0 pins as chip select instead of GPIO5.

You have also to use the appropriate wait states related to the connected memory otherwise the Read or write access operations can not be performed.

Kind regards,

Eris.