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bhines
Visitor II
January 12, 2010
Question

External SRAM troubles

  • January 12, 2010
  • 3 replies
  • 813 views
Posted on January 12, 2010 at 12:06

External SRAM troubles

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    3 replies

    B
    bhinesAuthor
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 09:45

    I have a 512k by 8 bit SRAM interfaced to an STR912FW44 via 8-bit multiplexed mode using CS0. Whenever I write a byte to it, it writes the same byte into 4 locations in the SRAM two bytes 10 hex apart in two places 100 hex apart. What am I doing wrong? The compiler is keil C.

    S
    sfouques9
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 09:45

    Hi All,

    Does anyone found why CS0 is activated 4 times in 8bits (or even 16!!) mux mode when writing a single byte at a single location ??? I did not found any chronogram for this mode ??

    With the same configuration on CS1, CS1 is activated correctly one single time ?!!

    regards,

    L
    lxu
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 09:45

    Do you define the SRAM address like this (*( volatile char*) 0x30000000)?

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