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murphyn
Visitor II
July 18, 2003
Question

GPIO Interrupts (STPC - Elite)

  • July 18, 2003
  • 3 replies
  • 928 views
Posted on July 18, 2003 at 13:30

GPIO Interrupts (STPC - Elite)

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    3 replies

    M
    murphynAuthor
    Visitor II
    July 14, 2003
    Posted on July 14, 2003 at 14:10

    Chaps,

    I've been looking around the datasheets for details on the rising/falling edge interupts on the GPIO port. The Elite Programming Datasheet has registers for programming rising/falling edge interupts, interrupt unmask etc (section 13), but which interrupt is polled?

    I'm assuming it's a hardware interrupt.

    Anyone Known?

    Thanks.

    MurF

    T
    thierry239955_st
    Visitor II
    July 18, 2003
    Posted on July 18, 2003 at 10:49

    It is a hardware interrupt but you have to enable and configure it using the chipset register (I/O in 0x22/0x23) number 0x58.

    Bit 0-3 = IRQ number with some limitation (IRQ 0, 1, 2, 8 and 13 not possible)

    Bit 7 = 1 to enable the interrupt, 0 to disable

    For example:

    outp( 0x22, 0x58 )

    outp( 0x23, 0x89 )

    will enable and use the IRQ9

    By default, this register is set to 0 and GPIO IRQ is disable.

    Farfalla

    [ This message was edited by: Farfalla on 13-08-2003 11:05 ]

    [ This message was edited by: Farfalla on 13-08-2003 11:05 ]
    M
    murphynAuthor
    Visitor II
    July 18, 2003
    Posted on July 18, 2003 at 13:30

    Most brilliant! Thanks Faralla. Will soon have my interrupts workin!

    MurF.

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