Interfacing UPSD33xx bus P0 with 5V devices

[gbillard9]

Posted on August 12, 2005 at 15:09

Interfacing UPSD33xx bus P0 with 5V devices

[gbillard9]

Posted on May 17, 2011 at 12:08

URGENT

The level on P0 is strange !! we find 3.3 V an 5V signal? When we want to interface P0 with an LCD (5V bus) using SN74TVC, the uPSD is out of order. What can we do ?

[joseph2399]

Posted on May 17, 2011 at 12:08

Please keep in mind that a 5V uPSD33xx device contains a 3.3V MCU and a 5V PSD module (Flash/SRAM/PLD). When the MCU drives the bus, the signaling is 3.3V, when the PSD module drives the bus (during a read operation), the signaling is 5V signals. Check the electrical specs in the data sheet to ensure that when the MCU is driving the bus, the signal levels meet those of your LCD, and vice versa. The MCU in the uPSD33xx does have 5V tolerant I/O except for port 1.

[gbillard9]

Posted on May 17, 2011 at 12:08

Thank you, but I know that the bus is 3.3V when it's used from CPU to external devices. My problem is to find a solution to adapt the 3.3V to 5V with bidirectional fonctionality !