Interrupt handlers and RAM

Posted on October 30, 2008 at 17:56

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Visitor II

Posted on May 17, 2011 at 09:56

I am having a strange problem, which I think relates to the special flash caching hardware.

My IRQ entry has this instruction: LDR PC, [PC,#-0xFF0]

to load the handler from VIC0

When the handler is in flash, things work fine: on IRQ, the PC is loaded with the handler from the VIC vector register as expected.

When the handler resides in RAM, the execution ''skips'' the IRQ entry and goes on to the FIQ handler, which then crashes my system.

If I place a breakpoint on the IRQ vector (0x18), the system works as expected.

Does anyone know how to get around this?

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