Is it Bug or Not? It is a big question!

[npivo]

Posted on August 02, 2007 at 10:08

Is it Bug or Not? It is a big question!

[npivo]

Posted on May 17, 2011 at 09:45

I am using mcbstr9 and IAR compiler + str91xstdlib.

In main-program I initialize TIM0 ISR in the next way:

Quote:

TIM_StructInit(&TIM_InitStructure);

/* 22.050 KHz generation */

TIM_InitStructure.TIM_Mode = TIM_OCM_CHANNEL_1;

TIM_InitStructure.TIM_OC1_Modes = TIM_TIMING;

TIM_InitStructure.TIM_Clock_Source = TIM_CLK_APB;

TIM_InitStructure.TIM_Prescaler = 0x1;

TIM_InitStructure.TIM_Pulse_Length_1 = 0x440;

/* Initialize the Timer 0 */

TIM_Init (TIM0, &TIM_InitStructure);

// Enable IRQ for Timer 0 on Priority Lvl 1

VIC_Config(TIM0_ITLine, VIC_IRQ, 1);

VIC_ITCmd(TIM0_ITLine, ENABLE);

TIM_ITConfig(TIM0, TIM_IT_OC1, ENABLE);

TIM_CounterCmd(TIM0, TIM_START);

/* ISR address request... */

isr_addr = VIC_GetISRVectAdd(TIM0_ITLine);

In the last line in above code I am trying to check ISR-addr and store it in u32 isr_addr...

Evrithing works good (initialization, ISR-routine and so on...) exclude the isr_addr remain 0!!! :o

Inside 91x_vic.c I found ISR-initialization code:

Quote:

static void VIC_ISRVectAddConfig(u16 VIC_Source, u16 VIC_Priority,

void (*VIC_VectAddress)(void))

{

if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */

VIC0->VAiR[VIC_Priority] = (u32)VIC_VectAddress;

else /* VIC1 */

VIC1->VAiR[VIC_Priority] = (u32)VIC_VectAddress;

}

and one more initialization function:

Quote:

static void VIC_VectEnableConfig(u16 VIC_Source, u16 VIC_Priority)

{

if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */

VIC0->VCiR[VIC_Priority] |= VIC_VECTOR_ENABLE_MASK;

else /* VIC1 */

VIC1->VCiR[VIC_Priority] |= VIC_VECTOR_ENABLE_MASK;

}

In both fuction above structure VIC0->VCiR[] (VIC1->VCiR[]) and VIC0->VCiR[](VIC1->VCiR[]) indexed VIC_Priority, but VIC_GetISRVectAdd function tryed to extract ISR-rutine information in another way:

Quote:

u32 VIC_GetISRVectAdd(u16 VIC_Source)

{

if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */

return VIC0->VAiR[VIC_Source</b>];

 

else /* VIC1 */

 

return VIC1->VAiR[VIC_Source - VIC_REGISTER_NUMBER</b>];

 

}

 

and as a result it return zeros instead ISR-routine address. :( After this shot reseach I made changes in 91x_vic.c module inside VIC_ISRVectAddConfig, VIC_VectEnableConfig and VIC_ITSourceConfig fuctions :

Quote:

.......

static void VIC_ISRVectAddConfig(u16 VIC_Source, u16 VIC_Priority,

void (*VIC_VectAddress)(void))

{

if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */

VIC0->VAiR[VIC_Source] = (u32)VIC_VectAddress;

else /* VIC1 */

VIC1->VAiR[VIC_Source - VIC_REGISTER_NUMBER] = (u32)VIC_VectAddress;

}

....

.....

static void VIC_VectEnableConfig(u16 VIC_Source, u16 VIC_Priority)

{

if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */

VIC0->VCiR[VIC_Source] |= VIC_VECTOR_ENABLE_MASK;

else /* VIC1 */

VIC1->VCiR[VIC_Source - VIC_REGISTER_NUMBER] |= VIC_VECTOR_ENABLE_MASK;

}

...

static void VIC_ITSourceConfig(u16 VIC_Source, u16 VIC_Priority)

{

if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */

{

VIC0->VCiR[VIC_Source] &= VIC_IT_SOURCE_MASK;

VIC0->VCiR[VIC_Source] |= VIC_Source;

}

else /* VIC1 */

{

VIC1->VCiR[VIC_Source - VIC_REGISTER_NUMBER] &= VIC_IT_SOURCE_MASK;

VIC1->VCiR[VIC_Source - VIC_REGISTER_NUMBER] |= VIC_Source - VIC_REGISTER_NUMBER;

}

}

...

After retesting my program I found that everythig works in true way and now isr_addr got true value - address of void TIM0_IRQHandler(void).

So, my main question is:

Do I found Bug in 91x_vic.c modules or all above is only my missunderstading internal structures of str91xstdlib-library? :-Y :-Y :-Y

[ This message was edited by: NikolayZ on 26-07-2007 22:56 ]

[npivo]

Posted on May 17, 2011 at 09:45

Hmm?

Nobody know answer to my question or nobody carry similar problem?

I allredy did my corrections in 91x_vic.c module and it's seems, that I was right, but I am not shure, because I have only short experiencz in ST912 microcontroller and MCB-STR9 evaluation board. 8-)

[andy_ry]

Posted on May 17, 2011 at 09:45

Quote:

On 28-07-2007 at 17:38, Anonymous wrote:

Nobody know answer to my question or nobody carry similar problem?

You are probably right! Moderators not often give answers in this conference (are probably too occupied). Therefore the majority solves problems through record directly in registers. For example:

// Configure and enable IRQ for A/D Converter (ADC)

VIC0->VAiR[15] = (unsigned int)ADC_IRQHandler; // Setup ADC IRQ Hndl addr

VIC0->VCiR[15] |= 0x20; // Enable the vector interrupt

VIC0->VCiR[15] |= 15; // Specify the interrupt number

VIC0->INTER |= (1<

// Configure and enable IRQ for Timer (TIM3)

VIC0->VAiR[7] = (unsigned int)TIM3_IRQHandler;// Setup TIM3 IRQ Hndl addr

VIC0->VCiR[7] |= 0x20; // Enable the vector interrupt

VIC0->VCiR[7] |= 7; // Specify the interrupt number

VIC0->INTER |= (1<

// Timer 3 Configuration (TIM3)

TIM3->CNTR = 0x0000; // Setup TIM3 counter register

TIM3->CR2 &= 0xFF00; // Clear prescaler value

TIM3->CR2 |= 0x000F; // Setup TIM3 prescaler

TIM3->CR2 |= 0x2000; // TIM3 timer overflow interrupt en

TIM3->CR1 |= 0x8000; // TIM3 counter enable

[npivo]

Posted on May 17, 2011 at 09:45

Thanks Andy_ry,

can you give me your e-mail?

I have couple additional question about hardware.

[andy_ry]

Posted on May 17, 2011 at 09:45

Hi Nikolay! My box is

mailto:[e-mail]

[terg]

Posted on May 17, 2011 at 09:45

I'm new to this processor so my understanding might not be correct but my take on it is this:-

The reference manual states that 'The interrupt priority is hardwired and cannot be changed'. (STR91xF reference manual page 94)

Therefore VIC0.0 will always have the highest priority and VIC1.15 the lowest.

Timer0 is on VIC0.4. By using the commands that you've used and setting the priority to 1, you've routed the Timer0 interrupt onto VIC0.1 and installed TIM0_IRQHandler() address into VIC0_VA1R.

Therefore a timer0 interrupt will be generated on VIC0.1 and it will provide the vector address.

When you call the command

isr_addr = VIC_GetISRVectAdd(TIM0_ITLine);

it is obvious from above that you will get 0 because the vector address is now at VIC0.1 and not VIC0.4.

It seems that once an interrupt priority is changed, referring to it by its

TIM0_ITLine is not applicable. It's best to think of the VIC channel that you've moved it to.

Does this make sense?

[npivo]

Posted on May 17, 2011 at 09:45

Thanks Andy_ry!

I got your e-mail.

[ This message was edited by: NikolayZ on 03-08-2007 08:59 ]