Jatin: Trouble in Output Compare

[jacktan1]

Posted on December 17, 2003 at 04:14

Jatin: Trouble in Output Compare

[jacktan1]

Posted on December 16, 2003 at 03:44

Hello Jatin:

I m using ST7F19 now. I set the DCR0 to a non-zero value, I monitor the CMPF0 in PWM0CSR, it never be set. Any other control bit need to be set?

preThank you!

J.V.

[jacktan1]

Posted on December 17, 2003 at 01:43

Hi Jatin,

I found that the CMPFx is set only when the TRANCR is equ to $01.

J.V.

[jacktan1]

Posted on December 17, 2003 at 04:14

Hi Jatin,

hei hei

I got it! It s true that the DCR won't do any affect until the OVF is set while the TRABCR is ''$01''. In case of sothware UART, we need DCR act immediately after we set it value. We cant wait OVF occurs! So I have a idea that I set ATR to $ffe, after we set the DCR we set TRABCR, and then set ATR to 0. then we just need to wait for the CMPFx set. Here the DCR is the absolute value of half bit delay, for the upcounter is increase from 0.

Anyway I will thank you for your help!

J.V.