Need TPM IC behavior model for develop

[CYHou]

HI ST teams,

I 've purchased STPM4RasPIV21 to test our SPI master device. I'v observed this TPM IC uses wait state when communication. Please help share behavior model(verilog) for SPI master simulation.

Thanks a lot.

[Peter BENSCH]

Welcome @CYHou, to the community!

The data of all ST33 devices is strictly confidential and will only be handed over if an NDA is signed. For this reason, nobody in the public community will be able to help you, so you should contact your local ST contact.

Hope that helps?

Regards
/Peter