Posted on May 17, 2011 at 09:34Bonjour ! (Hello !) I have a problem with Interrupts : I have the very simple need to mask some Its (without lost of any ITs) in the main – for very short period- because of some peripherals are shared. For example : .... VIC_ITCmd(TIM1_ITLine,DISABLE); .... use something which is also used in the handler of the TIMER01 ... VIC_ITCmd(TIM1_ITLine,ENABLE); ..... or .... TIM_ITConfig(TIM1,TIM_IT_TO,DISABLE); .... use something which is also used in the handler of the TIMER01 ... TIM_ITConfig(TIM1,TIM_IT_TO,ENABLE); ..... But, sometime, i suppose when the interrupt arrive while it is masked, the processor reset... Perhaps it is not the good ways to mask the interruption temporarily… but what it is the good ways? I am in the “main�, in “user mode�, there is no easy way to Set IRQ flag in CPSR (you have to switch in supervisor mode by software interrupt ... take care of the problem of IRQ attempt just in the asm instruction that set the bit... very complicated). Please, help me ! Charlu
to disable the interrupt you have to use VIC_ITCmd(TIM1_ITLine,DISABLE). I don't see what's the problem may be if you send me your code i can chek with you. best regards mirou
Precisely, it is that which does not work, and which produces inopportune “reset�!. I tried in many mode, with several peripherals... I use (for the moment) the “Raisonance� tools chain with their startup file (and IRQ handler inside). Perhaps, the problem is in the “handler�. But ''raisonance'' says : ''it's from ST''....??? I have for the moment resolve the problem by changing the “Startup� of “Raisonance� and by putting correctly (...) the processor in mode “sys�. I then write a macro in� __asm… “which masks/unmask the bit “IRQ� of “CPSR�… But, I would prefer to mask only the accused IT, and not all ITs…
Here an very simple example (among others). The software sending “key?� on “uart0�, and waits the reception of a character to start. Then a loop without end returns the value of channel 0 of the ADC read by IT. If i mask the ADC interrupt by “VIC_ITCmd (ADC_ITLine, SAYABLE)� or by “ADC_ITConfig (ADC_IT_ECV, SAYABLE)�, the program “reset� quickly. If not it turns without end. In a very different context, the IT timer produced the same problem.
I tested your code. You have a problem in __io_putchar (char c) function which doesn’t work. About the problem of reset, I couldn’t see this problem in your code. Can you please send me a code which uses many interrupts in the same time so I can reproduce the problem. Can you also explain to me the utility of masking some interrupts among others and then renabling them. Regards mirou
?? The function __io_putchar (char c) works correctly in three different programs... It's a very simple function, in pooling mode (we used P6.6/Rx and P6.7/TX). For the little project that I gave in example, the problem seems completely solved with the compilation in “ARM� mode instead “Thumb�… But in our complete program - with several ITs - the problem persists: very rarely, and always on Timer 1, the system resets following the mask/unmask of the interrupt... I have no time, now, to make a small program to clarify the problem… We work with global IRQ mask... Regards Charlu
Our startup file, is this from Ride-Raisonnance (last update : BN746-P1). I have only modified the normal start to put the Arm in true ''Sys-Mode'' (lines are from Iar-startup). You find it in the attached file. regards charlu
Hi all! I have the same problem with temporary masking interrupts.
I use int from UART0 and from Timer2. When I disable the interrupt for Timer2 in a normal program loop and enable it after short period of time (2 or 3 instructions later), sometimes the processor resets itself. I'm sure the int from UART0 does not influence this behavior. I tried to use crt0_STR91x.s posted by Charlu, but there were no difference. I use RIDE with newest Patch_BN746_P1_STR75x_STR9xStartup_061109.exe installed. Thank You for Your help. Miluk
I thought that this problem comes from nested interrupt. you must consider stack size on nested interrupt. basically, IRQ exception procedure is implemented as following user(or sys)mode --> IQR mode --> user(or sys) mode .... --> IRQ mode --> user(or sys)mode .... --> IRQ mode --> user(or sys)mode .... finally, reset or hang-up occured therefore large stack of user(sys) is needed. if you do not need to use nested interrupt,I recommand that disable interrupt on macro switching IRQ to user(sys) macro in the 91x_vect.s good luck. Best regareds KMSHIM