problem with output compare mode using AT2 in ST7LITE29

[jan2]

Posted on April 26, 2004 at 12:19

problem with output compare mode using AT2 in ST7LITE29

[jan2]

Posted on April 16, 2004 at 04:44

Hi!

I have just started to use the ST7 and have a problem with the autoreload timer.

The program that is attached to this message is supposed to generate a pulse every 320us on PA1 and very often on PA0.

The result is that most of the time the period is 320us but sometimes the period is 832us.

To me that indicate that I get the period I ask for plus the time the 12 bit counter take to roll over (4096/

.

What is my mistake?

/Janne

________________

Attachments :

timer.asm : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I01g&d=%2Fa%2F0X0000000bVF%2FKRcwkjnXzCcgVlvVBY4ugsrT5uDffD2DJxGdjA5tHD0&asPdf=false

[jan2]

Posted on April 16, 2004 at 04:47

I wonder where that smiley came from!? The text was (4096/8), I guess that's a code for a smiley.

[jatin]

Posted on April 16, 2004 at 11:11

Could you tell the values configured inside the timer registers? I am not able to get it well through the file you have attached.

[jan2]

Posted on April 18, 2004 at 15:26

Hi!

Below you can find the relevant parts of the program.

I have also (today) tried to explicitly set the registers $0d..$22 to the reset values in the init routine. No difference.

/Janne

init

ld A,#10 ;set delay to something DCR0H:DCR0L= 10:0

ld DCR0H,A

clr DCR0L

tnz PWM0CSR ;clear pending OCMP interrupt

bres PWMCR,#0 ;enable OPC function PWMCR = 0

ld A,#$11 ;CMPIE=1:Compare Interrupt Enable.

ld ATCSR,A ;counter clock = fCPU ATCSR = $11

rim ;enable interrupt

ret

int

bset TRANCR,#0 ;enable transfer TRANCR = 1

ld A,DCR0L ;read the last OCMP value

ld X,DCR0H

add A,#0 ;add delay

ld Y,A

ld A,X

adc A,#10

ld DCR0H,A ;an OCMP will occur after delay

cp Y,#$00 ;make sure we don't load zero

jrne skip

inc Y

skip

ld DCR0L,Y

iret

[jatin]

Posted on April 19, 2004 at 07:01

The maximum value that can be loaded in DCRx register for an 12-bit ART timer is 0xfff. But i think you are trying to load the value 0x1000 into the DCRx registers. So the DCrx value is 0x000. Also the ARTx value is 0x000. The DCRx value should be greater then ART value.

I do not understand , how you are generating a pulse after 320 usec. As per your setting, you are using the cpu clock source. So for getting the CMPx interrupt after 320 usec the DCRx should be loaded with 0x0a00.

[jan2]

Posted on April 19, 2004 at 15:54

Hi!

I load the high byte of DCR0 with 10 and the low byte with 0, or a total of 10*256+0=2560=$0a00.

I also add 2560 to DCR0 in the interrupt routine.

/Janne

[jatin]

Posted on April 21, 2004 at 13:17

I have two points:

1/ Why do you modify the DCRx registers in the interrupt routine? Do you want to modify the compare interrupt time? if not you do not have the need to modify the DCRx register each time in the interrupt routine. At each OVF event the DCRx register is loaded with the value present in the shadow register.

2/ In the interrupt routine, you have to read the PWMCSR register in order to clear the compare interrupt flag.

[jan2]

Posted on April 22, 2004 at 08:09

Hi (again)!

My answers to your points are:

1. If I don't modify the DCR0 register I get a period of 512 us (roll over).

2. The tnz PWM0CSR instruction read the register and clear the flag.

Can you provide me a pointer to an example of working code either in assembler or C for the

output compare function for the autoreload timer in the ST7LITE29?

/Janne

[jatin]

Posted on April 26, 2004 at 12:19

Please find attached the ART timer code from the new version of the ST7 software library. I hope this would help!!

Please note that this software code is from the beta version of the library.

________________

Attachments :

lart.zip : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I00J&d=%2Fa%2F0X0000000bVA%2FctzMZuNg_IImCFLgc.EBjTCSFbEca1E1AHzokVNSj5w&asPdf=false