Problem with UART Interrupt

[heiko23]

Posted on January 18, 2007 at 13:15

Problem with UART Interrupt

[heiko23]

Posted on May 17, 2011 at 09:34

Hello!

I have a problem with the UART-Interrupt.

When he arives I read the char or I write the char. Then I clear manualy the Interrupt Flag, but sometimes the Interrupt arrives immediately again and so I lose one char.

See:

void UART1_IRQHandler(void)

{

if (UART_GetFlagStatus(UART1, UART_RawIT_Receive) == SET)//Receive Interrrupt?

{

isr_scia_receive(); // Read 1 char and rec_cnt + 1

UART_ClearITPendingBit(UART1, UART_IT_Receive); // Receive Flag clear

}

else if (UART_GetFlagStatus(UART1, UART_RawIT_Transmit) == SET) // Transmit Interrupt ?

{

isr_scia_transmit(); // Send 1 char and trans_cnt - 1

UART_ClearITPendingBit(UART1, UART_IT_Transmit);// Transmit Flag Clear }

}

I do not use the UART-FIFOS, one interrupt = one char.

Is there something wrong?

[d_steffen]

Posted on May 17, 2011 at 09:34

1. remove the word else in the transmit interrupt int section

2. use the Flag UART_IT_Receive not RAW_.. for receive interrupt

3. use the Flag UART_IT_ReceiveTimeOut for receive interrupt

(may be this is only important if you use the rx hardware fifo

4. use the Flag UART_IT_Transmit not RAW.. for transmit interrupt

[heiko23]

Posted on May 17, 2011 at 09:34

Hello Barricade!

Thanks.

Your Info was my first try. With this it works much more instability.

But I found something.

I also use the CPU-timer-interrupt 0. It arrives every 5ms.

When I disable the CPU-Timer, the UART works.

I think theres is a problem with the UART-Flags, when an asynchronous interrrupt happens.

CPU-Timer Interrupt = VIC0

UART-Interrupt = VIC1

Best regards.

[alain239955_st]

Posted on May 17, 2011 at 09:34

Hello,

I got exactly the samme problem.

when I use UART Interup (on VIC1) And a Timer or a Ethernet interupt (on VIC0)

I lose chars.

To solve this problem I had to set the UART Interups on fast interupt (FIQ)

Regards

[d_steffen]

Posted on May 17, 2011 at 09:34

Hello acorchia,

and what will you do if you need more then one

uart ?

I think this is not the right way.

[d_steffen]

Posted on May 17, 2011 at 09:34

Hello feig,

please check using of the hardware fifo's.

This works fine for me with all 3 uarts.

[alain239955_st]

Posted on May 17, 2011 at 09:34

Hello

Actualy I use 3 Uart (2 at 250Kbauts and 1 at 38000 bauts), all of them use the fifo, and at each interupt, i check

UART_GetITStatus(TheUART, UART_PROGIO_IT_FLAGS) == RESET

for each Uart (actualy this is inlined just one bit test , very fast).

This is working very well with full loaded Uart 1 & 2 , Uart 3 is just a console and a Ethernet connection that analyse 2560 Udp frame /Sec.

I had to modifie the Ethernet driver to make it work on interupt.

Regards

[heiko23]

Posted on May 17, 2011 at 09:34

Hello Barricade.

Yes, the check of the harware-fifos works better than the check of the uart-interrupt-flags.

But I have to load a File in a FPGA which has a size of 3MB, in this case I lose one or two char. The problem is the FPGA-File is then useless.

When I disable the Timer-Interrupt it works fine.

Can I change the priority of the interrupt controller VIC0 and VIC1?

So that the UART-Interrupt has an higher priority as the CPU-Timer-interrupt 0?

Is it right, that I can only change the priorty of the lines in one interrupt controller?

Regards.

[d_steffen]

Posted on May 17, 2011 at 09:34

Hello feig,

any good news to this problem, I'm also fighting now with this

problem, is this still open or have you it solved ?

Best regards

[jiri23]

Posted on May 17, 2011 at 09:34

Hi,

the solution is to assign the both DVAR registers to a dummy IRQ hanlers. In case of not using the library IRQ handler (so jumping directly to the ISRs), the VARs should be also written to 0 at the end of the dummy ISRs.

Jiri