PSD logic problens

[sbencke3]

Posted on August 04, 2004 at 18:25

PSD logic problens

[sbencke3]

Posted on May 17, 2011 at 12:02

Hi,

I’m having some problems with my project somebody can help me?

My memory map is:

Main Flash:

FS0 – PAG: 0 – 0X0000 ~ 0X3FFF

FS1 – PAG: 0 – 0X4000 ~ 0X7FFF

FS2 – PAG: 0 – 0X8000 ~ 0XBFFF

FS3 – PAG: 0 – 0XC000 ~ 0XFFFF

Others:

RS0 – 0XC000 ~ 0XDFF

CSIOP – 0XE00 ~ 0XE0FF

LCD_E – 0XE100 ~ 0XE1FF

Secondary flash:

CSBOOT0 – 0X0000 ~ 0X1FFF

CSBOOT1 – 0X2000 ~ 0X3FFF

CSBOOT2 – 0X4000 ~ 0X5FFF

CSBOOT3 – 0X6000 ~ 0X7FFF

Main Flash: Data Space Only

Secondary Flash: Program Space Only

I’m running my IAP application at CSBOOT flash, but I can’t make my LCD routines works. If I put this same program at the main flash it works fine. Can it happen because my LCD_E logic is mapped in the same address of main flash? How can I resolve this?

Thanks in advance

Sombra