Regarding 54AC164245 device A side inpiut interface

[bgarai]

Hi, We are using 54AC164245 device for our onboard application. We have connected VDD1 as 5V and Vdd2 as 3.3V. As per datasheet the side A side max input voltage allowed is <=Vdd2.

In the case when the device will be in disable condition (Isolation) and also direction of the device will be side B to side A (so the device A side is configured as output and the device is in isolation state), can 5V signal connected to side A cause any harm to the long term reliability of the device?

[TDK]

You're outside of the operating conditions but within the absolute maximum value conditions. Generally, the device will be fine. However, long term operation is not going to be guaranteed here. Most datasheets have a general clause for this sort of thing, this chip being no exception.

 

[bgarai]

Thank you for your valuable input.

I will elaborate the actual scenario, when the A side seeing 5V bus:

The actual scenario, all the time the A side of the device will see the 3.3V signal, it is only when there is EEPROM access, i.e, on power-ON/reset, this A side of this device will see 5V bus signal output from EEPROM:

54AC164245 device configuration when the 5V databus from EEPROM will be active:

Enable, OEx is High. (i.e., device is isolation condition)

Direction, DIRx is Low (i.e., A side configuration is as Output)

This 54AC164245 device is used in our digital board as a level translator buffer for interfacing the  processor,  to SRAM(3.3V),  processor,  to EEPROM (5V), and processor to IO (5V), where the IO chip select is only used for enabling this buffer. so all the the devices will be enable exclusively once at time. Only when the 5V data bus read happens from EEPROM this bus is sharing the A side of 54AC164245 (which is at disable condition (isolation), and also the direction signal during this EEPROM access will be configured as B side to A side), which is strictly speaking considered as output side but device is in disable condition and not as input to the device 54AC164245.  According to the 54AC164245 datasheet Table 4, the output voltage can be 0 to Vdd1, so this is also strictly within the operating condition limit, as A side is not configured as input when A side is seeing the 5V bus from EEPROM.

Now with this above scenario, can you please clarify if it will really impact the long term reliability of the device?

[TDK]

I don't think the scenario is any different than in your original post, right? So my answer is the same.

You're outside the operating conditions. Redesign things to stay within them, or choose a different chip, or do your own testing on long term reliability. Manufacturer isn't going to guarantee the chip will work fine forever when you use it outside the operating conditions.