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A
alandras
Visitor II
June 25, 2007
Question

RTC errata regarding PERIODIC INTERRUPT ? / Solution

  • June 25, 2007
  • 4 replies
  • 858 views
Posted on June 25, 2007 at 15:20

RTC errata regarding PERIODIC INTERRUPT ? / Solution

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    4 replies

    A
    alandrasAuthor
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 09:36

    I had difficulties clearing interrupt generated by the PISF (Periodic Interrupt Flag) which should be cleared by reading RTC_SR (RTC Status Register )

    http://mcu.st.com/mcu/modules.php?mop=modload&name=Splatt_Forums&file=viewtopic&topic=4983&forum=21

    Quote:

    PISF: Periodic Interrupt Flag

    This bit is set by hardware. It does not set when the RTC is running on battery. It is cleared by reading the register.

    0: No periodic event

    1: A periodic event occurred as configured by the PISEL bits in the RTC_CR register.

    An interrupt is generated if the PIE bit in the RTC_CR register is set.

    In fact this is correct, but the interrupt ''VIC1.8 RTC Logic OR of Alarm, Tamper, or Periodic Timer interrupts'' is not cleared by this. As should.

    Quote:

    IRQStatus[15:0]: IRQ Status bits

    These bits are set by hardware after masking by the VICx_INTER and VICx_INTSR

    registers. An active bit will remain high until software clears the interrupt in the

    registers of the peripheral which sourced the interrupt event. Each bit corresponds

    to an input channel. IRQStatus0 gives the status of channel VICx.0 and

    IRQStatus15 gives the status of channel VICx.15 (see Table 8.).

    My experience (solution) is that the way to clear the PISF interrupt (not PISF itself) is to write 0000 to PISEL[3:0] in RTC_CR during the interrupt, than enable it back. You still have to read RTC_SR to clear the PISF but this is not directly linked to the interrupt signal.

    Is this somewhere allready explained ?

    regards,

    Andras

    A
    amira1
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 09:36

    Hi alandras,

    please find attached an example under IAR Compiler using RTC interrupt. In fact, to clear the RTC interrupt you have to disable RTC Periodic interrupt, to clear PISEL field and to read the SR register.

    I hope that it will be usefull for you.

    Best regards,

    mirou

    A
    alandrasAuthor
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 09:36

    Hi mirou,

    >I hope that it will be usefull for you.

    >Best regards,

    >mirou

    Thanks! It confirms my experience.

    Best regards,

    Andras

    R
    rhys
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 09:36

    Hi Mirou,

    I have taken your RTC.zip example and added to it a little such that I have added a Timer 1 interrupt running at 10ms.

    After a number of minutes of execution it blows up and goes through the line:

    __program_start: in 91x_init.s

    I am using IAR's EWARM 4.41A and a J-Trace on an STR910-EVAL board with an STR912FW44X6 ... 645 processor.

    My real application which is much larger has ST's example 'waveplayer' code code integrated into it, which is running a 44kHz interrupt in addition to the RTC 1024Hz periodic and Timer1 10ms interrupts and it falls apart much quicker.

    I enclose my version of your project RTC-2ints.zip

    (I have modified the pins that get toggled for connecting to an oscilloscope).

    Please can you have a look at this problem and tell me what needs to be done for Periodic RTC interrupts to work when there are other IRQ's present.

    Kind Regards,

    Rhys

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