SPV1040 Failure

[Pramod_Bangalore]

we are noticing some failure SPV1040 in our implementation on a board for energy harvesting from solar panel. The breakdown is only for SPV1040. Short between GND and Vout. Attached schematic for your reference.
we have taken the reference design of STEVAL-ISV012V1 and gone through the design recommendation doc of SPV1040. 

@ peter Bensch  
Can you please check and suggest on design.

Need support ASAP.

[Peter BENSCH]

Welcome @Pramod_Bangalore, to the community!

for what specific reason did you add the Schottky diode D5?

Regards
/Peter

[Pramod_Bangalore]

as per the datasheet. 
https://www.st.com/resource/en/datasheet/spv1040.pdf

[Peter BENSCH]

What is the specification of the solar panel?

[Pramod_Bangalore]

Specification of solar panel - 3.85V/4.4W, Voc:4.55v,Vm:3.85v,Isc:1.22A,Im:1.14A

we have updated the design without the Schottky diode D5, still then we are seeing failure with spv1040. short between GND and Vout. battery voltage at the time of failure 4.12V (3.7 V 9000 mAh battery spec).
shared the updated schematic.
please respond ASAP.

[Pramod_Bangalore]

sorry a small correction during failure with spv1040.  the short was between GND and LX.

Thanks

[Hexel]

Hello!

First question, what`s a purpose of IC2? It supposed to be a charger, but 1040 poses a battery charger with constant current output already.

Even besides that, current sense input may be shorted to ground, if not used. R29 with 0 Ohms is decision under question. GND and LX short means boost fet burned, due to input overcurrent or overvotage spike. C9 imho should be a bulk capacitor in current schematic, so I think 10uF is inadequatelly small, because MPPS response time may be too long to react to load current transient. It may be a cause of voltage spike. Try 100-1000uF instead. And, importantly, D5 should be populated to shunt inrush current of that capacitor while connecting PV. Maybe it`s a good idea to add bulk cap after output shunt and populate R29 with some relistic resistance.

Overcurrent may be estimated by IC temperature or measured directly at input.

What`s a D3 function?

[Pramod_Bangalore]

Thanks for your reply Hexel.
we have taken the reference schematics from the evaluation board from ST - STEVAL-ISVO12V1
Below have attached the reference, i hope it answers most of your questions.

[Hexel]

Oh I see its a sketch refference without PCB and waveforms. Ok, if you tried to just copy ref to your borad you really missed bulk cap I talking about, C6=47uF on L6924 part. Still I recomend trying 100-1000uF. L1 is actually 22uH (reads lower), and Rs is a sense shunt with parameter under it (50mV @ 1mA ?). Looks like that`s all I can tell by schematic.

Any other options are look at board design and waveforms in keypoints (LX, VOUT, VBATT). Does 1040 burn instantly or in specific conditions? How long does it take to burn? Does it even gets hot? Is it no load condition etc.

[Pramod_Bangalore]

we have tested with 100uF in C6. still we are seeing failure in spv1040. 
mostly it fails after 2 to 3 days under sunlight, also the battery will be above 4V when it fails mostly.
@Peter BENSCH are these IC(spv1040) have quality issues? why are we seeing failure when we follow the STEVAL-ISV012V1 schematics? Do you recommend to use the IC?

we need immediate support since we are near to bulk production.
Thanks.

[Hexel]

There`s actually couple of designs available with PCB.

https://docs.rs-online.com/c85f/A700000006572356.pdf

https://www.farnell.com/datasheets/1817171.pdf

https://static5.arrow.com/pdfs/2012/1/1/0/33/7/806/st_/auto/cd00292052.pdf

Both have supercap at the 1040 output so my assumption about trantient overvoltage may be correct. Following your symptoms that fail occur at high input and light load condition, lower FET may fail suddenly due to overvoltage when IC goes into constant-voltage regulation mode. MPPT loop response may be to long to hold voltage within acceptable limit. Supercap will provide sufficient time for loop to control voltage. Even while TVS is populated, its trim voltage lies far above IC failure threshold of 5.5V. And with use of supercap, shunt is absolutelly required to limit IC current.

Here`s another advice: you may debug PCB from a bench PSU in lab, just set its voltage and current to limiting ones of PV, I think it will ease you work.

[Hexel]

Run setup in a lab, use bench PSU to mimic PV behaviour (set PV limiting parameters as curr and volt of PSU). Check if 1040 tracks PSU settings and runs around that point (PSU mode will switch countiniously between CC CV mode). Manually charge battery to voltage of interest and take maesurements of key points: waveforms of input current (drawn from PSU), LX, VOUT voltages. It all could be done in lab and is a basic diagnostic jobs to talk about. I`ve already asked to put these waveforms here to take a look at. Show you PCB design, screenshot by a layer will be enought.

And you probably missed that supercap is not a 220uF (microfarads) but 220mF (millifarads). 3 orders difference BTW