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Visitor II
June 15, 2005
Question

ST10F276 - not entering in PowerDown

  • June 15, 2005
  • 4 replies
  • 1027 views
Posted on June 15, 2005 at 11:11

ST10F276 - not entering in PowerDown

    This topic has been closed for replies.

    4 replies

    sergAuthor
    Visitor II
    June 8, 2005
    Posted on June 08, 2005 at 10:55

    Description of problem.

    I'm trying to enter to PowerDown mode for ST10F276, ver.CAA based controller. To do it I disable internal voltage regulator & RTC. Procedure of PowerDown executed from XRAM (see F276BX_ER_V12.pdf, PWRDN.2).

    Execution of test program was stopped, pins of address bus goes to floating state. Supply current fall from ~30mA to 20mA, instead of appr. 1 mA.

    Why PowerDown current is too high?

    Compiler - Tasking Tools for C166/ST10 v7.5r2 Selected processor C167CR.

    example of code:

    ------------------------

    [...]

    // Entering in PowerDown procedure -

    // executing from XRAM

    static void sleepoff(void)

    {

    (*((volatile unsigned int*)0xED00)) |= 0x380; // RTCCON bit RTCOFF & OFF32

    enabled - stop RTC

    (*((unsigned int *)0xeb46)) = (*((unsigned int *)0xeb46)) | 0x8; // enable

    bit vregoff

    #pragma asm

    NOP

    NOP

    PWRDN

    NOP

    NOP

    SRST

    #pragma endasm

    } /* sleepoff */

    // Initialisation proicedure - exec before EINIT, as defined in project

    void myInit(void)

    {

    BUSCON0 = 0; // forced clearing BUSCON - disable external bus

    (*((volatile unsigned int*)0x12)) |= 0x400; // enable XMISC - for access to

    bit vregoff

    } /* myInit */

    [...]

    sergAuthor
    Visitor II
    June 14, 2005
    Posted on June 14, 2005 at 10:40

    1.

    I don't have ST10Freg file

    2.

    PWDCFG bit have state of default (clear)

    3.

    Fast interrupts on P2 disabled

    Full text programm on attachments

    ________________

    Attachments :

    PWD_prgogramm_text.txt : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0LL&d=%2Fa%2F0X0000000bXh%2FQpgW5Iqh_.PtEorRcsBlxbo9MIRX8YImHbDct5GoBgs&asPdf=false
    sergAuthor
    Visitor II
    June 15, 2005
    Posted on June 15, 2005 at 07:14

    4.

    NMI - high state

    Visitor II
    June 15, 2005
    Posted on June 15, 2005 at 11:11

    Hello,

    Find attached a header file for the ST10F

    Power down mode on the C167CR and the ST10F276 are entered in the same way by executing the PWRDN instruction while the NMI (Non Maskable Interrupt) pin is externally pulled LOW and NOT high otherwise the instruction has no effect.

    On the ST10F276, according to the bit PWDCFG, the device will enter either in Protected Power Down mode or in Interruptible power down mode(refer to the ducumentation for more details).

    On the C167CR, only one power down mode is available.

    Regards,

    [ This message was edited by: Najoua on 15-06-2005 15:28 ]

    [ This message was edited by: Najoua on 15-06-2005 17:08 ]

    ________________

    Attachments :

    reg276.h : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0D3&d=%2Fa%2F0X0000000bXf%2F7mWM8G1V_M6566VLt.SI2Z9IGiOMCQuIf60DQDcVdMY&asPdf=false