ST10F276 soft in IFLASH, data in XFLASH, not clear XFLASH

[p-alain]

Posted on October 31, 2006 at 13:19

ST10F276 soft in IFLASH, data in XFLASH, not clear XFLASH

[thomaskobler9]

Posted on June 20, 2006 at 12:21

Quote:

A flash library supported by TASKING and Keil toolchains will be provided by ST.

Is this library available?

I find AN2033 (porting from ST10F269 to ST10F276) a little missleading on this subject, cause only the different mapping (additional blocks) are mentioned:

1.3.2 Software impacts

 

The mapping of the application and the programming and erasing routines are impacted.

Therefor I assumed, the IFlash is programmed like with the F269 and the additional controller registers are for the XFlash only.

[najoua]

Posted on June 20, 2006 at 13:23

Hello kobler,

No, the ST10F276 IFLASH is not programmed in the same way as the ST10F269 Flash.

The ST10F269 and the ST10F276 Embedded Flashs are different: different technologies (0.35µm for the ST10F269 and 0.18µm for the ST10F276).

For more details about the Flash programming, you can refer to the two devices' documentation.

Regarding the Flash library, it is available and will be published on the net. If you need it urgent, you can ask your ST local contact.

I hope this answers your questions.

Best regards,

Najoua.

[mirco23]

Posted on August 29, 2006 at 03:35

Is the Flash library already available on the net?

[najoua]

Posted on August 30, 2006 at 05:35

Hello,

No, it is not yet available on the net.

You can ask your ST local contact in order to get it.

Regards,

[lspr35]

Posted on October 15, 2006 at 09:46

Hello,

I am currently trying to program the IFlash of the ST10F269. Unfortunately I have problems at the very beginning when trying to check wether LOCK in FCR0L is low. Fot this I am using the following code:

BSET DP2.8 ; LED red on

BSET P2.8

CHKLOCK1: MOV R0,#FCR0L ; check LOCK

EXTS #14,#1

MOV R1,[R0]

AND R1,#0010h

CMP R1,#0

JMPR CC_NE,CHKLOCK1

BCLR P2.8

Unfortunately this loop is infinite -> LOCK seems to be always 1. I can see this because the red LED remains on! Maybe the MOV R1[R0] statement does not read the FCR0L register but the external flash which is erased in this moment. But I don't understand why! Is there anything else required to map the flash registers into the E000x memory region? The contents of my SYSCON is 0111$0111$1000$0000b -> so the ROMEN bit is set to 1! The microcontroller is NOT in BSL mode in this moment.

Does anybody have a hint for me?

Thanks in advance

Squonk

[najoua]

Posted on October 16, 2006 at 09:03

Hello,

I suppose that you are speaking about the ST10F27x and not the ST10F269 because FCR0L register exists on the ST10F27x.

In order to be able to access Flash registers, XFLASH memory must be enabled given that Flash registers are located in the XFLASH.

XFLASH memory is enabled by setting:

- XFLASHEN & XMISCEN bits in XPERCON register.

- XPEN bit in SYSCON register ( cleared in your actual configuration)

Hope this helps you,

Regards,

Najoua.

[lspr35]

Posted on October 16, 2006 at 10:07

Hello Najoua,

Yes, I am using a ST10F276. I think I have set these registers already as required. But it still does not work. Are there any other settings required (e.g. XPEREMU)? What about ROMS1 setting - does this matter? I set ROMS1 to 1 in order to map the internal flasch completely in segment 1.

What about BSL mode? Currently BSL mode is not active when I try to access the flash registers.

Thank You for Your kind help.

Regards

[najoua]

Posted on October 26, 2006 at 05:22

Hi,

Did you define correctly the FCR0L address? How did you define it?

Regards,

Najoua.

[lspr35]

Posted on October 26, 2006 at 17:55

Hello I defined it with:

FCR0L EQU 0000h ; Flash Control Register 0 low

and then I test for the LOCK Bit with:

CHKLOCK1: MOV R0,#FCR0L ; check LOCK

EXTS #0Eh,#1

MOV R1,[R0]

AND R1,#0010h

CMP R1,#0

JMPR CC_NE,CHKLOCK1

This loop never ends! Probably because I access ext. Flash (which is erased at this moment).

I am using ST10F276.

Do You have any hints?

Best regards

Squonk

[najoua]

Posted on October 27, 2006 at 06:58

Hello Squonk,

Could you please tell me:

1/ what is the toolchain you are using?

2/ in which order the two registers XPERCON and SYSCON are defined? the XPERCON register must be defined before the SYSCON register bacause Register XPERCON cannot be changed after the global enabling of X-Peripherals, i.e. after setting bit XPEN in SYSCON register.

If XFLASHEN bit is set after the global enabling with XPEN-bit in

SYSCON register, no address space is not occupied by the XFLASH where the flash registers are located.

I had reproduced the behavior you are observing( the loop checking the LOCK bit never ends) using the start-up file generated by Tasking as it is, I mean: SYSCON register is defined before XPERCON register. In this case, the XFLASH containing the flash registers is not correctly enabled. Consequenctly, the flash registers (including FCR0L) can not be acceded.

To solve the problem, I changed the order of the two registers (XPERCON is configured before SYSCON) and i disabled the 'Generate system startup code and add it to project' under PROJECT OPTIONS -->STARTUP.

Please let me know if this is your case. Otherwise, we will continue investigating the problem.

Regards,

Najoua.

[ This message was edited by: Najoua on 27-10-2006 10:29 ]