ST72F561 port direction problem

[y_gudekar]

Posted on May 21, 2007 at 08:16

ST72F561 port direction problem

[y_gudekar]

Posted on May 17, 2007 at 16:04

Hi All,

in my application i am contineoulsy changing direction of PORT D HIGHER NIBBLE (at periodicity of 5 sec).

I FOUND SOME TIMES, EVEN I CHANGED DIRECTION AS OUTPUT AND PUT SOME DATA ON IT, BUT DATA NOT GET REFLECTED.

If someone came accross such problem, then plz help me.

What care i need to take in software to overcome such problem.

Warmly.........

Yogesh Gudekar.

[wolfgang2399]

Posted on May 21, 2007 at 08:16

Hi Yogesh,

first question: do you write the actual data to the ports when changing their direction? Because, if you change output data anywhere in your program - even with BRES or BSET - you'll read the respective input values of those ports that you have selected as inputs and write it to the output latches of exactly those ports. When then changing the direction you'll output the values, fetched at the time they have been inputs.

Another trap: pay attention to the interrupt routines! Changes you do in an interrupt routine may be lost upon if there will be a modification in the main programm just at the moment of the modification by an interruption. To illustrate the effect I'll give you an example in assembler code:

____main_________

...

ld A,PADR

__interrupt_____

...

bres PADR,#4

...

__end of interrupt___

or A,anyValue

ld PADR,A

...

When the interrupt appears unfortunately between

ld A,variable and ld varible,A

the modification in the interrupt will be lost upon the very variable.

There are two solutions to solve the problem. Identify all the variables which could be modified by an interrupt routine. Disable interrupt each time while changing the value of such a variable in a noninterrupt routine OR change the bits of those exclusively with BSET and BRES.

Completing I'll point the following fact out to you: In the chapter I/O PORTS of each manual they recommend a save switching of the states of the ports. Find out the chapter heading I/O PORT IMPLEMENTATION and have a look at the figure Interrupt I/O Port State Transition.

Best regards,

WoRo