Skip to main content
Visitor II
December 5, 2002
Question

st7lite9

  • December 5, 2002
  • 5 replies
  • 1202 views
Posted on December 05, 2002 at 21:28

st7lite9

    This topic has been closed for replies.

    5 replies

    Visitor II
    December 3, 2002
    Posted on December 03, 2002 at 21:04

    Hi

    I have problems with the timer interrupt.(AT TIMER Overflow interrupt)

    I am using indart-st7flite0 for st7lite09B.

    I want to ouput as port ''A'' about Temp(var). and generate 10ms time interrupt.

    ref. After execute instruction ''rim'' , not operate program.

    I don't understand why isn't operation.

    Visitor II
    December 4, 2002
    Posted on December 04, 2002 at 06:07

    Hi,

    Could you supply the code?

    as text here or attachment?

    Simon

    Anglia Internal Apps Support
    Visitor II
    December 4, 2002
    Posted on December 04, 2002 at 06:54

    st7/

    INTEL

    #INCLUDE ''ST72FLT0.INC''

    INTEL ; intel format

    WORDS ;

    segment byte at 80-BF 'ram0'

    BYTES

    .TEMP DS.B 1 ; temp Register

    WORDS

    segment 'rom' ; rom area

    main

    CALL ram_clr ; ram clear

    CALL timer_init

    CLR TEMP

    RIM

    port_

    LD A, #0Fh

    LD PADDR,A ; configures port A[0..4] as output

    LD PAOR, A

    LD A, TEMP

    LD X, #0ffH

    CP X, TEMP

    JRNE port_ret

    LD A, #00H

    port_ret

    LD PADR, A ; writes this value on port A

    JP port_

    timer_init

    LD A, #12h ; count clock :Fcpu

    LD ATCSR,A ; OVFIE : Overflow Interrupt Enable

    LD A, #0F0h

    LD ATRL,A

    LD A, #0fh

    LD ATRH,A

    LD A, #00h

    LD CNTRH,A

    LD A, #00h

    LD CNTRL,A

    RET

    ;***************************************

    ; Clear RAM (80H - BFH)

    ;***************************************

    ram_clr

    LD X, #80H ; 84H-BFH

    LD Y, #40H ; 60 Bytes

    ram_clr2

    LD A, #00H

    loop1

    LD (X), A

    INC X

    DEC Y

    JRNE loop1

    RET

    delay

    LD Y, #200

    d_loop2

    LD X,#0FFH

    d_loop1 DEC X

    JRNE d_loop1

    DEC Y

    JRNE d_loop2

    RET

    timer_cap_rtn

    INC TEMP

    iret

    segment 'vectit'

    DC.W 0 ; FFE0-FFE1h(Not Used)

    DC.W 0 ; FFE2-FFE3h(SPI Peripheral interrupts)

    DC.W 0 ; FFE4-FFE5h(LITE TIMER RTC interrupts)

    DC.W 0 ; FFE6-FFE7h(LITE TIMER input Capture interrupt)

    DC.W timer_cap_rtn ; FFE8-FFE9h(AT TIMER Overflow interrupt)

    DC.W 0 ; FFEA-FFEBh(AT TIMER Output Compare interrupt)

    DC.W 0 ; FFEC-FFEDh(AVD interrupt)

    DC.W 0 ; FFEE-FFEFh(Not Used)

    DC.W 0 ; FFF0-FFF1h(Not Used)

    DC.W 0 ; FFF2-FFF3h(External interrupt 3)

    DC.W 0 ; FFF4-FFF5h(External interrupt 2)

    DC.W 0 ; FFF6-FFF7h(External interrupt 1)

    DC.W 0 ; FFF8-FFF9h(External interrupt 0)

    DC.W 0 ; FFFA-FFFBh

    DC.W 0 ; FFFC-FFFDh(Software interrupt)

    DC.W main ; FFFE-FFFFh(Reset)

    end

    Visitor II
    December 5, 2002
    Posted on December 05, 2002 at 09:05

    Hi,

    A few points:

    1. in the timer setup, it may be worth

    LD A, ATCSR

    this will clear any pending interrupt.

    2. in the interrupt routine

    LD A, ATCSR

    must be used to clear the interrupt flag

    3. Although i can not see it said in the data,

    I would load the ATR H first then L, as normal.

    writing to CNTRH and L is pointless, these are read only

    The ATR value is loaded to the CNTR at each overflow, an interrupt is also generated.

    One other minor point, you have not loaded the RC calibration value from memory to the RC calibration register.

    Your flite will be operating around 6.5MHz

    regards,

    Simon

    ANGLIA Internal Apps Support

    Visitor II
    December 5, 2002
    Posted on December 05, 2002 at 21:28

    hi

    thanks your support.

    As insert ''LD A,ATCSR'' in interrupt routine, Solve problem.