ST92F150 startup initalizing external RAM to 0

[scott239955]

Posted on March 22, 2005 at 05:51

ST92F150 startup initalizing external RAM to 0

[scott239955]

Posted on May 17, 2011 at 11:36

I have 128K external RAM on an ST92F150 that is capacitor backed up. Some of the data in the external RAM needs to be retained between power cycles. I'm using the medium memory model with unmapped data object so they are always access through far pointers in my application.

I put an advanced break point when writing to an address in external RAM and it is being written to in the crtbegin file at startup. I think it is being initialized to zero depending on the section info table. How do I not initialize part of the memory so that it can be retained?

:o

[siegmund]

Posted on May 17, 2011 at 11:36

Hi Smiles,

you can prevent the initialization of variables (the secinfo-table).

to do this put the following options in your makefile to:

CFLAGS = -DNO_SEC_INFO

LDFLAGS = -Xlinker --no-secinfo-table -nostartfiles

(i actually dont know wether the option nostartfiles is neccessary or not).

Then you have nomore initialized variables! be aware of this.

also inspect all variables in the .data-section. i have relocated the .data-section into flash.

hope this helps.

siggi

[siegmund]

Posted on May 17, 2011 at 11:36

hi smiles,

another question:

which mode for XRAM-access do you have?

mode mc=0 (original ST9-Mode), or

mode mc=1

(compare to page 143 on st9-datasheet v4).

i have trouble with mode mc=0 and 32K sram.

Write axess doesnt work with new sram-types (55ns).

(view my discussion in this forum: st92F150 problems with XRAM)

can you help me, please?

thanks,

siggi

[scott239955]

Posted on May 17, 2011 at 11:36

Hi Siggi,

I use MC=1 (Intel) mode. This mode uses one pin for Read and another for write and the AS pin become ALE. I'm not familure with the mode you are using. I attached a file that may help you initialize the RAM correctly if you ever decide to use MC=1. I put a latch on port 0 and ran AS (ALE) to the clock signal to multiplex the lower data lines and address lines. The R/W (WR) signal goes to WE signal on the RAM, and the DS (RD) signal goes to the OE pin on the RAM.

Smiles :p