STM32F103C8 (Blue Pill) UART 300bps 7E1 Data Corruption Issue - Loopback Test Failed
Hi everyone,
I'm experiencing a persistent and perplexing issue with UART communication on my STM32F103C8T6 (Blue Pill) board. I'm trying to communicate with an energy meter using the IEC 61107 standard, which requires 300 bps with 7 data bits, Even parity, and 1 stop bit (7E1) during the initial handshake.
While my setup works flawlessly at higher baud rates (e.g., 600 bps, 9600 bps) with other configurations, I consistently encounter data corruption (receiving garbage characters or no response) specifically at 300 bps, 7E1.
Here's a detailed breakdown of my setup, troubleshooting steps, and observations:
1. Hardware Setup
MCU: STM32F103C8T6 (Blue Pill board)
Development Environment: Arduino IDE (with STM32Duino core, latest version)
UART Peripheral Used: USART2 (PA2/PA3) for communication with the energy meter.
External Interface: MAX485 module (for RS485 conversion) connected to an optical probe for the energy meter. (Note: The problem persists even when bypassing the MAX485 and connecting directly to a USB-to-TTL converter for loopback/testing).
2. Clock Configuration & Baudrate Accuracy
I've meticulously configured the clock and checked the baud rate error using STM32CubeIDE to ensure maximum accuracy:
System Clock: Configured to use HSE 8MHz (external crystal on Blue Pill) with PLL to achieve a 72MHz System Clock (HCLK).
3. UART Configuration (STM32CubeIDE confirmed)
The UART (USART2) is configured as follows in STM32CubeIDE:
Baud Rate: 300 bps
Word Length: 7 Bits
Parity: Even
Stop Bits: 1 Stop Bit
Hardware Flow Control: Disabled (asynchronous mode)
4. Conclusion & Question
Based on the repeated failure of the internal Loopback Test at 300 bps 7E1, it strongly suggests that the hardware UART on this STM32F103C8T6 chip is struggling with this specific low baud rate and frame format.
Has anyone else encountered similar issues with STM32F103C8 (Blue Pill) UARTs at very low baud rates like 300 bps, especially with 7E1 configuration?
Are there any known silicon errata or specific workarounds (beyond standard clock optimization) for the STM32F1 series UARTs at these extreme low speeds?
Could there be a subtle configuration setting I'm missing that disproportionately affects 300 bps communication, even if the error percentage looks fine?
Any insights or recommendations would be greatly appreciated!
Thank you.
