STPC Atlas commercial configuration vs industrial

[terrance]

Posted on March 07, 2005 at 01:20

STPC Atlas commercial configuration vs industrial

[terrance]

Posted on March 01, 2005 at 11:31

Good morning,

We have designed a board based on the STPC Atlas reference design and have 2 versions. 1 version has the commercial Atlas and the 2nd has the industrial Atlas. The board with the industrial Atlas runs fine, but the commerical version does not run (Start). All voltages and clocks have been verified. I have done some further investigation and have come to the conclusion that the core on the ATLAS commercial part is not starting. The chip does not get as hot as it does on a processor that is running correctly (I have some commercial parts on other vendors CPUS to compare against), it only gets a few degrees above the ambient temperature in the lab. I know the HCLK runs the 2.5 volt core, the PCI_CLK, and the ISA_CLK. My PCI_CLK is running at about 500 KHz and the ISA_CLK is not running at all. This coupled with the lack of power output from the chip makes me think the 2.5 volt core in the chip is not even starting. I have checked my Vcore voltage on all the cards again. They are all at 2.54 volts. All the clocks are running except PCI_CLK and ISA_CLK.

I looked at my strapping options and did have some questions.

I noticed that the reference design I used to determine the commercial part strapping has some no connects called out that are required for the industrial part. These pins are strapped on my cards in both the industrial part configuration. These pins are:

COMMERCIAL INDUSTRIAL Our board

MD22 NC PU PD

MD31 NC PD PD

MD32 NC PU PU

MD33 NC PU PU

MD34 NC PU PU

MD35 NC PU PU

MD39 NC N/A PU

MD49 NC N/A PU

I am wondering if this difference could cause the commercial part not to start correctly.

Thank you for your help...

[kaouther]

Posted on March 02, 2005 at 07:02

Does all the board with the commercail versions does not start at all?

The strap option configuratin on the board must work with the twwo version of Atlas. Where is it mentionned that some strap are not required for the commercial?

In the Atlas datasheet:

- MD31 /MD32 /MD33 /MD34 /MD35 : are Pull up must be implemented.

- MD22/MD39 /MD49 : are not connected.

[terrance]

Posted on March 02, 2005 at 19:25

Thank you for your reply. We reviewed your suggestion and have found the No connect reference for MD[31:36] comes form the

STPC ATLAS REFERENCE SCHEMATIC, ISA MODE

ST REF # SA000302CC

SCH REV C June 15, 2001

Page 4 strap options table

Sheet Rev B

This contradicts the altas datasheet issue 1.1.pdf file dated 6/11/04.

Our design connects them as follows:

MD[32:36] pulled up

MD[31] pulled down (this also contradicts the data sheet 1.1 but the industrial part boots)

We also have the following connections for MD[22], MD[39], and MD[49]

MD[22] is pulled down

MD[39] is pulled up

MD[49] is pulled up

These pins should be NC according to the datasheet issue 1.1 but do not cause the industrial part not to boot.

I have built five boards using the industrial version of the ATLAS that boot and 5 boards using the commercial version of the atlas that do not boot. Both the commercial version and the industrial version parts use the same PCB. The Vcore is 2.54 vdc for the commercial and 3.3 vdc for the industrial parts. The commercial parts have the HCLK set to 60MHz and the industrial version parts have the HCLK set to 60 MHz. The PCI_CLK is set to run at half the HCLK on both types of board. The cards that do not boot are not issuing a rom chip select to my BIOS so it never loads. The non-booting cards also have a PCI_CLK of 500 KHz and no ISA_CLK. All the other clocks on the card look good. The reset looks like it is within specifications.

I am going to modify one of the commercial boards to pull up MD[31], and no connect MD[22], MD[39], and MD[49] to see if I have a different results.

Could the strapping differences on the MD[31], MD[22], MD[39], and MD[49] straps account for the problem with the commercial cards? If so, why am I not experiencing the same failure on the cards using the industrial parts?

Thank you again for help and assistance.

[kaouther]

Posted on March 03, 2005 at 06:37

There is no contradiction with the datasheet.

You are using an OLD version of reference schematics since 2001. A new version of reference schematics (2004) is available on the web site also you can download the the latest Atlas datasheet ''release 2''.

[terrance]

Posted on March 04, 2005 at 09:27

Thank you again...

The writing on top of the processor I have is:

STPC12HEYC

Q2YN*5713DAC

JP2A20333

J302APA1

KOREA

Here are the traces plus:

CMC_PCI_CLKtoHCLK.jpg CH2 = PCI_CLKI CH1 = HCLK

CMC_PCII-PCIX.jpg CH2 = PCII CH1 = PCIX We only have one Ethernet device on out PCI_CLKx

CMC_PCIREtoHCLK.jpg This is the riseing edge of the PCI_CLKI relative to HCLK

CH2 = PCI_CLKI CH1 = HCLK

CMC PCITEtoHCLK.jpg This is the trailing edge of the PCI_CLKI relitive to HCLK

CH2 = PCI_CLKI CH1 = HCLK

CMC_POWER_SEQ.jpg This is the power supply sequence

CH1 = 5 vdc

CH2 = 3.3 vdc

CH3 = 2.5 vdc

________________

Attachments :

CMC_PCI_CLKItoHCLK1.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HttW&d=%2Fa%2F0X0000000aYS%2FM4UxXwywwuRzrjEjEDajLLu_j2yBi_ew7GPKfBa0RYY&asPdf=false

CMC_PCII-PCIX.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Htrl&d=%2Fa%2F0X0000000aY6%2FCRyBqiC.8Svop2wsQnk0wEFVgKnp89t5YdJfKowT2JU&asPdf=false

CMC_PCIREotHCLK.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Httg&d=%2Fa%2F0X0000000aYU%2FsipuW7gemzuJQzyQtVPAHKgvMxsqvEJ6NXqRWOYeHAs&asPdf=false

CMC_PCITEtoHCLK.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HttX&d=%2Fa%2F0X0000000aYT%2FMvzil9wS0Pl9uATJMTTFeGNr1vP2RA9ofBWUhx8HCWQ&asPdf=false

CMC_POWER_SEQ.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Httq&d=%2Fa%2F0X0000000aYV%2FwEfEAMda0bOUXglGe.6.QfcvX4jXyC6RJYXX7Cdh_jw&asPdf=false

[twitwity]

Posted on March 07, 2005 at 01:20

hello,

I don't know exactly what those signal means in DSO screenshots.

but if hclk runs alright , and PCI and ISA clocks shows any problem,

check the boards' system reset condition.

power on reset condition and timing should be met and released

to out-of-reset state to get the chip to run.

(i designed our board using STPC VEGA and in early time, i noticed similar phenomenon as yours.

the reset glitch or double pulse is hard to detect and even worse, the reference circuit and value of the circuit element - resistor or power monitoring IC's individual operating aspects etc. - does not match sometimes..

if the reset pulse is not clean, it is likely that PCI clock runs at a few kiloherz.. and be sure to check the individual electrical or temporal margin of each version of the chip. i think to cope with this kind of problem, the rule of thumb is most helpful. don't trust the data sheet TOO MUCH. I had much trouble myself figuring out a few critical notion in the VEGA datasheets and its programmer's manual. :( i think as a whole, STPC data sheets are lacking much of vital data.

as long as i experienced, HCLK, MCLK are working , one reason for such problem on PCI clk is RESET. if two chips are the same chips with different working range, and industrial version works and commercial version does not, or vice versa, it sounds obvious that strap option is not the probable reason for it. )

good luck.

jeremy.

[ This message was edited by: Twitwity on 07-03-2005 09:09 ]

[ This message was edited by: Twitwity on 07-03-2005 09:28 ]