STR75X Reset in (NRSTIN)

[jmore]

Posted on March 16, 2007 at 13:55

STR75X Reset in (NRSTIN)

[jmore]

Posted on March 15, 2007 at 16:38

The STR750 Reference Manual states:

In addition, you must provide an external RESET for at least 20 μs after the VDD_IO powersupply has reached its minimum working value (3.0V or 4.5V depending on power scheme).

It is recommended to use an external Power-On-Reset circuit monitoring VDD_IO to assert the RESET at power-up because it is not possible to rely on the RSM to generate a RESET at power-up.

However the Keil and Embest reference boards use a simple R/C as the external reset generator, not a traditional reset chip. Is this ok?

Thanks,

Jonathan More

[kleshov]

Posted on March 16, 2007 at 06:41

A simple RC network should be sufficient as long as the rise time of power supply voltage does not exceed a certain limit which depends in the values of R and C.

You probably meant ''evaluation boards'' rather than ''reference boards''. An evaluation board cannot be considered mission-critical, so they could cut a few corners here and there. If you want peace of mind, use a supervisor IC.

- mike

[ This message was edited by: volius on 16-03-2007 11:13 ]

[kaouther]

Posted on March 16, 2007 at 13:55

Hello,

Using an RC could be sufficient but you need to be sure that

the rise time of the VDD_IO power supply must be as specified.

(comprised between 20µs/V and 20ms/V)

>>It is recommended to use an external Power-On-Reset circuit

monitoring VDD_IO to assert the RESET at power-up because it is not

possible to rely on the RSM to generate a RESET at power-up.''

=> This is because the RSM is not guaranteed only when the VDD_IO

voltage is 3.0V minimum. In addition, when regulators are disabled in

case of dual external 5.0V/3.0V & 1.8V power sources, the RSM is

disabled and not possible to generate a Reset at power-up by the RSM.

That's the advantage to use an external reset circuit.

Hope it is clear.