the perplexity about the MAC/DMA Controller with DMA

[sunyuanling1022]

Posted on March 17, 2007 at 21:19

the perplexity about the MAC/DMA　Controller with DMA

[amira1]

Posted on May 17, 2011 at 09:39

Hi sunshan,

1&2.As you said the FIFOs are readable only but the TX DMA block has a DMA master engine that is able, following the information written in the TX configuration registers, to load data (from a specified memory area) in the TX FIFO.

3.Yes I confirm this mistake in the reference manual the TX DMA block moves data to the TX FIFO from a specified memory area and not RX.

Thank you and best regards.

mirou

[sunyuanling1022]

Posted on May 17, 2011 at 09:39

Hello,everyone.when I read 8th part of STR91xF reference manual about MAC/DMA Controller with DMA,I think there are some contradictions.e.p.:

1. Page 149 It said：“The FIFOS are readable(write has no ffect)�?.so,when I want to transmit data to the net,I think I must write data to the TxFIFO.

2.Page 155 It said:''After the DMA has been properly enabled for a TX data transfer, a valid descriptor fetched, and some data have been loaded to the TX FIFO, the DMA starts to move data from the DMA TX FIFO to the MAC-802.3 core.'' so I want to known who put the data in the TX FIFO?

3.Page 160 It said :''The RX DMA block uses the information written in the TX configuration registers, to move data to the TX FIFO from a specified memory area (master DMA).'' why is the RX DMA ?why The DMA Transmit the data from the memory area to the FIFO now?I think it is TX DMA block not the RX DMA block.Am i right? what is the function of the TX FIFO?and how is work?

[sunyuanling1022]

Posted on May 17, 2011 at 09:39

Hi mirou,Thank you very much!

Best regard!

sunan