Trouble with clock configuration

[michael]

Posted on April 02, 2008 at 04:33

Trouble with clock configuration

[michael]

Posted on May 17, 2011 at 09:51

Hello all,

I have a serious problem. I am using a STR9 and I am trying to do something completely trivial: to configure a timer to fire an interrupt every elapsed period. I cannot get it done! I have seen that others had the same problem, I tried the suggested solutions to no avail..

Here is the essense of the source:

Code:

TIM_StructInit(&TIM_InitStructure);

TIM_InitStructure.TIM_Mode = TIM_OCM_CHANNEL_1;

TIM_InitStructure.TIM_OC1_Modes = TIM_TIMING ;

TIM_InitStructure.TIM_Clock_Source = TIM_CLK_APB;

TIM_InitStructure.TIM_Prescaler = 0xF;

TIM_InitStructure.TIM_Clock_Edge = TIM_CLK_EDGE_FALLING ;

TIM_DeInit(TIM0);

TIM_Init (TIM0, &TIM_InitStructure);

TIM_ITConfig(TIM0, TIM_IT_OC1, ENABLE); // Enable the Timer Overflow interrupt

TIM_CounterCmd(TIM0, TIM_START); // Start the Timer0 counter

// VIC configuration ---------------------------------------------------------

VIC_DeInit();

VIC_Config(TIM0_ITLine, VIC_IRQ, 4);

VIC_ITCmd(TIM0_ITLine, ENABLE);

the processor is configured like this:

Code:

SCU_MCLKSourceConfig(SCU_MCLK_OSC) ;

// PLL frequency is calculated according to the formula: fPLL = (2 x N x fOSC)/(M x 2P)

SCU_PLLFactorsConfig(32, 25, 2) ; /* PLL = 16 MHz */

SCU_PLLCmd(ENABLE) ; /* PLL Enabled */

// SCU_PLLCmd is now locked, change clock source

SCU_MCLKSourceConfig(SCU_MCLK_PLL) ; /* MCLK = PLL */

// Set the PCLK Clock to MCLK/2, i.e. 8 MHz */

SCU_PCLKDivisorConfig(SCU_PCLK_Div2) ;

SCU_APBPeriphClockConfig(__ADC, ENABLE) ;

Now, in my 91x_it.c file I have the following handler:

Code:

void TIM0_IRQHandler(void)

{

TIM_ClearFlag(TIM0, TIM_FLAG_TO); //Clear the TIM_TO flag for the next interrupt

}

And I have integrated the debug firmware library into my project (STR91xD.lib). I am trying to run a output compare on channel 1 of TIM0 to no avail. I see that if I use the release version of the library, I keep on getting ''undefined instruction'' exception. the debug variant does start th timer, but never ever invokes the interrupt!

Please help me if you can! Thanks

[michael]

Posted on May 17, 2011 at 09:51

mirou,

Could you explain the difference between SCU_PLLFactorsConfig(32,25,2) and SCU_PLLFactorsConfig(128,25,4) ? When you assign the numbers both give 16 MHz.

I have found the following in the datasheet:

fPLL = (2 x N x fOSC)/(M x 2P)

Where the values of M, N and P must satisfy the following constraints:

1 ≤ M ≤ 255

1 ≤ N ≤ 255

0 ≤ P ≤ 5

STR91xF reference manual 2 Power, reset and clocks

51/411

1 MHz ≤ fOSC/M ≤ 2 MHz

200 MHz ≤ (2 x N x fOSC) / M ≤ 622 MHz

4 MHz ≤ fOSC ≤ 25 MHz

[amira1]

Posted on May 17, 2011 at 09:51

Hello michael.tamir,

Have you enabled the timer0 clock? Please refer to the STR9 standard library available on the net: there is a working timer example using OC1 interrupt. You should just replace TIM1 by TIM0 and change the PLL frequency from 96MHz to 16MHz.

Regarding the PLL factors, for fPLL=16MHz and a 25MHz oscillator frequency: M=25, N=128 and P=4 and not as you mentioned in your example.

Best regards,

mirou.

[michael]

Posted on May 17, 2011 at 09:51

Mirou,

Thanks for your reply. The problem was a missing __irq keyword before the ISR function. But either way, I have learned to configure most of the registrs myself, without the kind help of the library. By the way, did you see my post about the STR9 user manual inaccuracy?

[michael]

Posted on May 17, 2011 at 09:51

I see! the constraint for (2 x N x fOSC) / M is violated.

thanks anyway.

[amira1]

Posted on May 17, 2011 at 09:51

Hello michael.tamir,

I think these eaquations are complicated to solve. You can simply use CAPS, if you have Flashlink or Rlink, to find out the PLL factors.

You should just enter the PLL desired frequency and the oscillator frequency, and a 91x_conf.h file will be generated where you will find these values.

Best regards,

Amira.

[michael]

Posted on May 17, 2011 at 09:51

Thanks. I just did.