UART status register set overrun but RXFIFO empty

[llebotlan]

Posted on March 27, 2006 at 11:08

UART status register set overrun but RXFIFO empty

[llebotlan]

Posted on March 23, 2006 at 11:38

Hi,

This is my state :

uart->SR = 0xA6

// means : TimeoutIdle|OverrunError|TxHalfEmpty|TxEmpty

My uart->IER = 107 // means RxHalfFull|TxHalfEmpty|TxEmpty

My uart handler wakeup by the TxEmpty interrupt and noticed there is a UART overrun error. I don't know why. So I clear the SR, the overrun bit and I record the problem.

After the next TxEmpty interrupt call. The overrun bit is still set. Why? Is there a good reason for it. Why the overrun bit is set and the RxFifo empty ? Can I read Status Register bit that are not set in the Interrupt Enable Register ?

The Overrun bit is almost set each time the handler is call. This happened only when I send data during initialisation of our software.

Thanks,