Im new to the ARM cores and to ST micros. I have been able to get my CAN and I/O to work fine but I cant seem to get the UARTS to react at all. I set it up with out FIFO load the DR register and expect to see a frame on the pin but instead all I get is the FR register showing Tx buffer full and UART0 busy. I checked the clock gating and reset holds. Setup up the GPIO 3.0 for RXD and 3.1 for TXD. Its on a reva board and im using Raisonance tool chain. code is as follows: SCU->PRR1 |= 0x00020000; // release P3 reset SCU->PCGR1 |= 0x00020000; // clock gating P3 SCU->GPIOIN[3] |= 0x00000001; GPIO3->DIR &= 0xFE; // Dir input on GPIO3 for pin 0 SCU->GPIOOUT[3] |= 0x00000008 GPIO3->DIR |= 0x02; // SETUP the UART0 SCU->PRR1 |= 0x00000008; // release UART0 reset SCU->PCGR1 |= 0x00000008; // clock gating UART0 UART0->CR = 0x0380; UART0->LCR = 0x0060; UART0->IBRD = 0x0138; UART0->FBRD = 0x20; UART0->ICR = 0x07FF; UART0->CR |= 0x0001; UART0->DR = 0x34; for(;;); Im sure it something simple but I can't seem to get my head around it. Ryan
Thanks I hope it works with the library and I will try it out today.
But my real problem is with understanding what register I have forgot to initialize to get the UART0 to TX. Is there a way to turn on BRCLK from FMSTR I assume it defaults ON as Fmstr/2 as per the docs. Ryan