Skip to main content
R
robin_tang
Visitor II
May 13, 2005
Question

UPSD 3234A IAP

  • May 13, 2005
  • 2 replies
  • 767 views
Posted on May 13, 2005 at 14:43

UPSD 3234A IAP

    This topic has been closed for replies.

    2 replies

    R
    robin_tangAuthor
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 12:06

    Hi,

    I am working an IAP application for the UPSD3234A. The most of firmware code were based on DK3200 IAP example and I only changed a little bits to disable memory reading founction. The IAP application works well in the most of the time. But something it fails to write data into main flash in the range from 0xFF00 to 0xFFFF.

    Project info: UPSD 3234A 40MHz

    Main flash: 0x8000 - 0xFFFF

    Boot flash: 0x2000 - 0x3FFF

    Does anyone has similar experience ? Thanks in advance.

    R
    robin_tangAuthor
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 12:06

    Thanks so much !

    I guess it may be due to the hardware issue. The SRAM is in 0x0000 - 0x1FFF. DDCRAM is closed when IAP is doing flash programming.

    I tested several chips and found one out of ten may failed to program the main flash in 0xFF00 to 0xFFFF. However, I will check the FLASH code again. If you have any idea, please kindly advise. Thanks again.

    Terms & ConditionsAccessibility statement