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Visitor II
December 2, 2004
Question

uPSD 3254

  • December 2, 2004
  • 12 replies
  • 1970 views
Posted on December 02, 2004 at 09:58

uPSD 3254

    This topic has been closed for replies.

    12 replies

    dshah08Author
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 12:03

    Thank you phaze426. I thoughjt about decoding 4 bits of page register to create 16 pages (8 for external flash(256K) and 2 for external FPGA sram(64K). This won't work if I want to run from primary flash in code space and then use fpga sram in data space to read/write since I could only select 1 of 16 pages at a time.

    It would work if I use lower 3 bits of page register to create 8 pages of Primary flash and use 2 upper page register bits to select the FPGA sram.This way I can run from Primary flash and use FPGA sram in data space for read/write.

    Does this sound right ?

    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 12:03

    Dilip,

    Yes... I'd say that's the best way to do it. It's a little tough to program in PSDSoft express, however, because you'll have to throw in pgrX signals into the chip select equations for your SRAM. Other than that, though, you shouldn't be thrown any curveballs.