Skip to main content
V
vasgrammatikakis
Visitor II
February 6, 2008
Question

VERY IMPORTANT I2C SIOE PROBLEM!!!!!!

  • February 6, 2008
  • 1 reply
  • 534 views
Posted on February 06, 2008 at 05:26

VERY IMPORTANT I2C SIOE PROBLEM!!!!!!

    This topic has been closed for replies.

    1 reply

    V
    vasgrammatikakisAuthor
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 11:51

    Dear All,

    As usual I am posting this message here since I am not expecting help from ST technical support.

    I think I have found a bug in the SIOE I2C engine of the Upsd3454. The problem is the following.

    When the SIOE is set in master receiver mode and a transaction is initiated, you CANNOT read correctly S1STAT register from the foreground program.

    The exact command in assembly is

    mov a,S1STA

    I checked it in Debug mode with Keil and Keil indicates a value of say 0x2A in S1STA, while after the execution of the command, accumulator holds 0x00.

    The same command is ok when executed in the background ISR caused by I2C SIOE engine.When executed in the background then it returns the correct value held in I2C S1STA status register.

    If anyone else can confirm this situation then it is a silicon bug of the processor.

    The slave device was a P9539 I2C bus expander from T.I.

    Also another problem in receiver mode seems to be the fact that after a STOP has been imposed on the bus by the processor(after finishing receiving the required number of bytes), there is an extra interrupt caused for actually no reason.

    Is this caused by the STOP condition on the bus?

    If this is the case, then why isn't it created also when the processor is in transmitter mode and it imposes a STOP condition after finishing the transmition of the required bytes?

    If anyone has any comments on these please send them.

    Thanks

    Terms & ConditionsAccessibility statement