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Graduate II
September 28, 2023
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How to Modify RFAL Library for ST25R3918 Without ST25R3916_CMD_TEST_ACCESS Register

  • September 28, 2023
  • 10 replies
  • 9784 views

I am using the ST25R3918 and the 'pollingTagDetect' example from the RFAL library. This chip does not have the ST25R3916_CMD_TEST_ACCESS register.

How can I modify this library?

    This topic has been closed for replies.
    Best answer by Brian TIDAL

    Hi,

    the ST25R3916 RFAL library is designed for ST25R3916 and its derivative (such as ST25R3918). It is not needed to modify the ST25R3916 library for ST25R3918.

    Rgds

    BT

    10 replies

    Technical Moderator
    September 28, 2023

    Hi,

    the ST25R3916 RFAL library is designed for ST25R3916 and its derivative (such as ST25R3918). It is not needed to modify the ST25R3916 library for ST25R3918.

    Rgds

    BT

    Graduate II
    September 29, 2023
    Hi again Mr. Brian,
     
    My NFC board has an ST25R3918, and this antenna is single-ended. In my code, I added the following function:
     
    st25r3916WriteRegister(ST25R3916_REG_IO_CONF1, (ST25R3916_REG_IO_CONF1_single | ST25R3916_REG_IO_CONF1_rfo2 | ST25R3916_REG_IO_CONF1_out_cl_disabled | ST25R3916_REG_IO_CONF1_lf_clk_off_on)); 
    rfalAnalogConfigInitialize(); 
    rfalInitialize(); 
    while (1) { 
    rfalFieldOff(); 
    platformDelay(500); 
    rfalNfcaPollerInitialize(); 
    rfalFieldOnAndStartGT(); 
    ....
     
    Also, in the platform.h file, I added:
     
     
    #define ST25R3916 
    #define ST25R_SELFTEST 
    #define ST25R_SELFTEST_TIMER 
    #define ST25R_COM_SINGLETXRX /*!< Use single Transceive */ 
    #define ST25R_SS_PIN GPIO_PIN_4 /*!< GPIO pin used for ST25R SPI SS */ 
    #define ST25R_SS_PORT GPIOA /*!< GPIO port used for ST25R SPI SS port */ 
    #define ST25R_INT_PIN GPIO_PIN_5 /*!< GPIO pin used for ST25R External Interrupt */ 
    #define ST25R_INT_PORT GPIOC /*!< GPIO port used for ST25R External Interrupt */ #define platformProtectST25RComm() do { globalCommProtectCnt++; __DSB(); NVIC_DisableIRQ(EXTI9_5_IRQn); __DSB(); __ISB(); } while(0) 
    #define platformUnprotectST25RComm() do { if (--globalCommProtectCnt == 0U) { NVIC_EnableIRQ(EXTI9_5_IRQn); } } while(0)
     
    I am not sure if these definitions are correct. Are they correct?
    Technical Moderator
    September 29, 2023

    Hi,

    ST25R3916 ,ST25R_SELFTEST , ST25R_SELFTEST_TIMER are usually defined at compiler level (-D) rather than in platform.h.
     
    Your st25r3916WriteRegister setting will be overwritten by the analog setting. you should rather modify rfal_analogConfigTbl.h or the custom analog config file:
    search for RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_INIT in the table and adjust the ST25R3916_REG_IO_CONF1 register according to your hardware setup.
     
    Rgds
    BT
     
    Graduate II
    October 3, 2023

    Hi again, I am grateful for your help thank you so much.

    In the code below, after the ST25R3916_IRQ_MASK_WT interrupt, platformErrorHandle is triggered. However, when I don't activate ST25R_SELFTEST, ST25R3916_IRQ_MASK_GPE does not trigger in st25r3916.c file. But, when I activate the second ST25R3916_IRQ_MASK_GPE, platformErrorHandle is triggered. What could be the reason for this?

    Technical Moderator
    October 3, 2023

    Hi,

    errors triggered inside ST25R_SELFTEST code are the helpers to debug porting issues. The ST25R_SELFTEST checks first that the SPI communication is operational (write a pattern to a register and read it back) and then causes an interrupt from the device and checks the proper handling of the ST25R interrupt. It seems the ST25R interrupt is not properly handled on your platform. 

    Make sure:

    • the ST25R interrupt pin is properly connected to the MCU GPIO
    • this GPIO is properly configured in interrupt mode (i.e. External Interrupt Mode with rising edge detection)
    • the Interrupt Service Routine properly calls st25r3916Isr() (see EXTI0_IRQHandler in stm32f4xx_it.c)
    • platformProtectST25RComm/platformProtectST25RIrqStatus properly protect unique access (on bare metal, it is usually done by temporarily disabling the interrupt)

    Rgds

    BT

    Graduate II
    October 3, 2023

    I didn't add st25r3916Isr() in EXTI0_IRQHandler(void). I added then ST25R_SELFTEST doesn't error thank you but ST25R_SELFTEST_TIMER has a error. 

    Technical Moderator
    October 3, 2023

    Hi,

    ST25R_SELFTEST_TIMER checks that platformTimer/platformGetSysTick macros are properly implemented. It starts a 20 ms General Purpose Timer on the ST25R device and checks that the timer expires in 20 ms +/- 2 ms.

    It is likely that the SYSTICK on your board is not accurate or does not have the proper 1ms value. Do you use an HSE crystal oscillator or an HSI internal RC oscillator? Just toggle a GPIO inside the SysTick_Handler and probe it with a scope to check the value of the SYSTICK. 

    Rgds

    BT

    Graduate II
    October 5, 2023

    Hi,

    I use an HSI internal RC oscillator. I check SysTick_Handler and it seems okay.

    Rgds

    ZD

    Technical Moderator
    October 5, 2023

    Hi,

    can you connect a logic analyzer on the SPI (CLK/MISO/MOSI/SS) + IRQ_ST25R + SYSTICK GPIO (toggling every 1 ms) and send me the trace? what is the duration between the Start General purpose timer direct command and the IRQ_ST25R  interrupt?

    Rgds

    BT

    Graduate II
    October 5, 2023

    Hi,

    I hope understood correctly.

    la1.PNG

    la2.PNG

    Rgds

    ZD

    Technical Moderator
    October 5, 2023

    Hi,

    the SPI clock seems to be around 40kHz (if I am not wrong, this is usually 5MHz in our demos). Do you confirm? The reading of the interrupt status takes 1.5ms to be compared with the 2ms margin for the General Purpose Timer expiry in the SELFTEST_TIMER. Any reason to have such a low speed on the SPI? What is your MCU clock configuration? Make sure to have the proper SPI prescaler in order to reach ~4 MHz or increase the margin in the SELFTEST_TIMER or disable the SELFTEST_TIMER.

    Rgds

    BT

    Graduate II
    October 6, 2023

    Hi,

    I use these values. I tried many options and this is the best result.
    If I use the high speed value, I cannot see SPI communication in Logic Analyzer.

    Rgds

    ZDspi.PNGhse.PNGla.PNG

    Technical Moderator
    October 6, 2023

    Hi,

    "If I use the high speed value, I cannot see SPI communication in Logic Analyzer." Well, make sure to properly configure your Salae device (go to device settings and configure the proper sampling rate in order to be able to capture SPI at 4MHz i.e. > 20 M sample per second)

    A 62.5 kHz clock for the SPI causes transfer duration that is not really compatible with a 2 ms margin to check the accuracy of the systick in the SELFTEST_TIMER... Again I would recommend to use 4MHz (prescaler 4 for a SYSCLK of 16MHz).

     

    Rgds

    BT

     

    Graduate II
    October 6, 2023

    Hi,

    OK I am going to try.
    I use ST25R3918 and my colleagues designed it. When I check the PCB. I saw that the schematic was correct but the layout was not correct as per the layout recommendations.
    Could there be a problem with this situation?

    Rgbs
    ZD

     

    Technical Moderator
    October 6, 2023

    Hi,

    I can hardly comment. At least, let test SPI communication at 4MHz on this board.

    Rgds

    BT

    Technical Moderator
    October 6, 2023

    Hi,

    inside the SYSTICK interrupt handler, toggle a GPIO and trace this GPIO in Salae in addition to the SPI+IRQ. Then send me the salae file (I can hardly investigate on screenshot...).

    Rgds

    BT

    Graduate II
    October 9, 2023

    Hi,

    You can access the file from this link.

    Rgds

    ZD

    Technical Moderator
    October 9, 2023

    Hi,

    make sure to follow Salae recommendation regarding the sampling rate (https://support.saleae.com/faq/technical-faq/what-sample-rate-is-required). With a SPI clock at 4MHz, a 8MS/s sampling rate is not enough to provide a reliable trace: some SPI clock ticks are randomly lost as in the following screen shot

    BrianTIDAL_0-1696838018717.png

    Can you confirm that ST25R3916_TEST_TMR_TOUT has not been modified (this is 20ms in the genuine code)?

    Also can you confirm that a 27.12 MHz crystal is being used on your custom board?

    Rgds

    BT

    Graduate II
    October 9, 2023

     

    I didn't modify it, and I am using a 27.12 MHz crystal.

    I cannot exceed the MS/s value. I installed extensions for STMicroelectronics - ST25R3916 (B) on Logic 2. I used it and added a capture in this link.

    Technical Moderator
    October 9, 2023

    Hi;

    the General Purpose Timer is started with a value of 2C38h i.e. 6.68 ms

    BrianTIDAL_2-1696844638004.png BrianTIDAL_1-1696844618983.png

    Therefore the GPT expires 6.68 ms after the E0h direct command:

     

    BrianTIDAL_4-1696844926144.png

    So, compared to the original code, the ST25R3916_TEST_TMR_TOUT has been modified.

    Rgds

    BT

    Technical Moderator
    November 6, 2023

    Hi,

    thanks for your feedback.

    The C language guaranties that uninitialized  global variable are implicitly initialized to 0 (practically such variables are allocated in the .bss segment which is memset to 0  by the c runtime initialization). Therefore changing uint8_t globalCommProtectCnt; to uint8_t globalCommProtectCnt = 0;. has no real effect. 

    I believe that the real fix is " I adjusted the resistor of my PCB antenna matching component."

    Rgds

    BT

    Graduate II
    November 8, 2023

    Hi,

    I believe too, now everything is okay.

    Rgds

    ZD