Linux demo X-NUCLEO-NFC06A1 canot find device

[KVoul.1]

I connect the module to a raspberry pi 3 through SPI, compiled and executed sudo./demo/nfc_demo_st25r3916. I changed the interrupt pin to physical pin 11 because the default was busy.

The demo stays at scanning and never detects the module.

I ran it with gdb and it is caught in an endless loop in main.c:111.

Function "st25r3916CheckChipID" in "Linux_RFAL_st25r3916_v2.2.0/rfal/source/st25r3916/st25r3916.:141" returns ERR_HW_MISMATCH. The ID returned is 0, that would be "old silicon" according to the code comment.

I connected SC to the module's CN5 pin 3 and also triyed pin 1.

1.How does the read in the register happens if spiTxRx is not called from st25r3916CheckChipID>st25r3916ReadRegister > st25r3916ReadMultipleRegisters > st25r3916comTxByte( ((reg & ~ST25R3916_SPACE_B) | ST25R3916_READ_MODE), true, false );

2. what may be wrong in my setup?

[Ulysses HERNIOSUS]

Hi KVoul.1,

0x00 is not a valid chip ID of any ST25R reader. I suspect that your hw setup is not working. You mention connecting SC (=/SS=CS?) to CN5.3. Do you use a the ARPI 600 or did you do your own wiring?

Did you see in the UM the steps to configure the SPI block in Raspberry Pi?

ad 1. Execution if correctly configured should be: st25r3916comTxByte->st25r3916comTx->platformSpiTxRx->spiTxRx-> ioctl

Best Regards, Ulysses

[KVoul.1]

Hello and thank you for the quick reply. SPI is enabled per UM in the rpi and there is an spidev.0.0, are there extra steps? I don't use  the ARPI 600, I connected according to the schematics. pin11(changed in code,pin7 reported busy)-CN5.2, MISO-MISO, MOSI-MOSI, CLK-CLK, CS-SS, 3V3-CN6.4, 5V-CN6.5, GND-CN6.6 Is there special wiring?

[Ulysses HERNIOSUS]

Hi KVoul.1,

sounds all o.k. in your wiring. There should not be extra steps needed. No idea what could be the reason for it not to be working.

I propose to debug into SPI signals on CN5 using logic analyzer/scope to see if the SPI sequences go there or to find one missing due to cable is broken/incorrect/shorted, .... Concentrate on MOSI,SCLK,CS, then move to MISO, later on to INTR.

Best Regards, Ulysses

[Brian TIDAL]

Hi KVoul.1

make sure to have the following wiring :

11 P_SCK -- D13 CN5.6
 9 P_MISO -- D12 CN5.5
10 P_MOSI -- D11 CN5.4
 8 P_CE0 -- D10 CN5.3

Using a logic analyzer, make sure that the SPI Chip Select behaves correctly.

If the SPI Chip Select does not behave correctly, this might be due to a wrong linux configuration or caused by an old spi driver not properly managing the cs_change field (it seems there was some fixes in the spi driver for the Chip Select management in the past years).

Rgds

BT

[KVoul.1]

Hello, this cannot be correct:

P_MOSI -- D12 CN5.5
P_MISO -- D11 CN5.4

the x-nucleo-nfc06a1 schematic writes CN5.4 -MOSI and CN5.5 -MISO. I will check with the logic analyzer, but can you confirm the pinout?

[Brian TIDAL]

Hi,

sorry for typo. I've fixed my previous post with the correct pinout.

Rgds

BT

[KVoul.1]

Problem solved. The fault was because I changed the interrupt pin(default was busy) and used number 11 in the C code where I should have used 17(physical pin 11). Number 11 corresponded to SCLK and was set to IN and I had no clock.

[Brian TIDAL]

Hi,

Nice to see your issue is fixed.

By default the Pi allows you to use SPI0 with chip select pins on CE0 on GPIO 8 and CE1 on GPIO 7. This is why the GPIO 7 is by default busy. The Pi can be configured to use only 1 chip select. See dtoverlay=spi0-1cs in the Pi documentation.

Rgds

BT