ST25R3916-DISCO unknown crystal oscillator part number

[Gaston]

Hi,

By checking the ST25R3916-DICSO BOM I've found the reference Y200 (27.12MHz Crysta Osc.l)

 

The problem is I'm not able to find the part number NX2016SA STD-CZS-5 27.12MHz from NDK anywhere. What part is populated in the board? NDK does not give me any information without sharing project details.

On the other hand, the alternative part number XRCGB27M120F3M00R0 from Murata (Lad cap: 6pF) does not match with the load capacitance of the DISCO board (10pF)

Could someone clarify this matter?

regards,

gaston

[Travis Palmer]

Hello Gaston,

Visiting ndk.com, and navigating to products => Crystal unit => NX2016SA will guide you to the product page of the used crystal.

There are two flavors available:

STD-CZS-7 and STD-CZS-6.

As you can see, for our disco kit we used the NX2016-STD-CZS-5 which was recommended by NDK to us at this point of time. Nevertheless the STD-CZS-7 and STD-CZS-6 as well as the automotive graded version STD-CZS-3 are compatible with our NFC readers.

As an alternative the muRata device can be used. It has been used in the ST25R3911B-DISCO and X-NUCLEO-NFC05A1 design.

BR Travis

[Gaston]

Hello Travis,

Thanks for clarifying. I'd need an automotive version but there is no STD-CZS-3 part for 27.12MHz. For this purpose NDK offers through distributors the alternative part number NX2016SA-27.12MHZ-EXS00A-CS01188 with limited information and no datasheet. (Except if you provide information about the project).

I definitely want to look for another option but I want to be sure it meets the ST25R3916 front-end requirements. For example, with regard to the load capacity and the stability and tolerance of the fundamental frequency. Last question in my previous post was about the load cap. in the DISCO kit. Could you help me with this issue?

regards,

gaston

[Travis Palmer]

Hello Gaston,

Below the calculation of the Load capacitance.

CL=[(C1*C2)/(C1+C2)] + CS + CIC

C1,2 ... capacitors connected at XTI and XTO. They shall have the same value.

CL ... load capacitance specified in the crystal datasheet

CS = 2pF (assumed) parasitic depending on PCB design.

CIC = 4pF (assumed) Input capacitance of the IC

I assume the load capacitance of the crystal is around 8pF – depending on the used crystal.

Assuming that C1=C2, C1,2 can be calculated by

C1,2 = 2*CL – CS – CIC = 2*8-2-4 = 10pF

The XTI input capacitance can be assumed to be 4pF. The Cs is dependent on your PCB layout.

To pass certain compliance tests, the Reader needs to output a field of 13.56MHz +/-7KHz. PPM stands for "parts per million". It's like percent which is parts per hundred, but based on million (10^6) instead of hundred (10^2). Therefore, a drift of 7kHz would mean 13567000Hz instead of 13560000Hz, which is 0.0516224 % more or 516PPM. 

br Travis

[Gaston]

Travis, thank you. I had not taken into account the calculation of Load Capacitance

However I don't understand the final result.

As you said, the formula is

CL = [(C1*C2)/(C1+C2)] + CS + CIC

and the C1,2 (assuming that C1=C2) is

C1,2 = 2*(CL - CS - CIC)

I we assume that CL=6pF, CS=2pF and CIC=4pF the result of C1,2 is zero and this is not possible.

Perhaps CL would have to be around 10pF (or more) and then C1,2 = 4pF

Is it correct or is there something that I am not taking into account?

regards,

gaston

[Travis Palmer]

Hello Gaston,

You are right, i was not very clear.

The CS i mentioned before is already two times the correct value. I measured today the following values for CS (empty PCB):

X-NUCLEO-NFC05A1: 0.9pF

ST25R3916-DISCO MB1414-B: 1.1pF

Same applies for the CIC.

BR Travis

[Gaston]

Travis, thanks for confirming but still does not add up to me.

If CS=1pF, CIC=2pF and CL=6pF we have that the capacitors C1,2=6pF while NUCLEO and DISCO boards are populated with C1,2=10pF

Please could you check it?

gaston

[Travis Palmer]

Hello Gaston,

Lets maybe focus on a actual example:

Looking at the NDK hompage i have identified a suiteable crystal: NX2016-STD-CZS-6. It has the following specification:

 

For calculating the load cap it would mean:

CL = [(C1*C2)/(C1+C2)] + CS + CIC => C1,2  = 2*(CL - CS - CIC)

Where CL = 8pF, CS = 1pF, CIC = 2pF

C1,2 = 2* ( 8 - 1 - 2) = 10pF

The crystal we used has the same load capacitance specifications.

BR Travis

[Gaston]

Great, now I get it!

Thank you for the given support.

regards,

gaston