ST25R3916B - FIFO Access Issue
Hello everyone,
I’m using the X-NUCLEO-NFC08A1 expansion board, which integrates the ST25R3916B chip, to set up an NFC Tag-Reader system. Before moving forward with this implementation, I want to test the reader's full functionality. So far, I’ve been able to read and write to registers and send direct commands via SPI. I verified these operations using an oscilloscope to monitor the MISO, MOSI, and CS/NSS lines, ensuring they work correctly.
The next step involves loading data into the FIFO to proceed with using the chip as a Reader. However, I’ve run into an issue: data is not being loaded into the FIFO as expected.
To load data into the FIFO, I am following the SPI protocol as specified in section 4.3.3 of the chip's datasheet. I send the frame 1000 0000 (0x80), followed by a data frame that varies from 1 to 512 bytes. Unfortunately, this doesn't seem to work, as no data appears in the FIFO.
Similarly, when attempting to read from the FIFO using the frame 1001 1111 (0xAF), I also receive no data. I can confirm this issue because, after both write and read attempts, the FIFO Status Register 1 and FIFO Status Register 2 remain empty (0x00), indicating no successful write or read.
Without resolving this, I'm unable to proceed with using the chip as a Reader, so I’m completely stuck. Could anyone assist me?
For additional context:
- The SPI protocol is correctly implemented (it works in all other cases).
- The CS/NSS pin is correctly set low before each SPI read or write operation.
- I’ve also tried setting the Operation Control Register with bit 7 high (0x80), and experimented with setting this register to 0xC8 (to enable Rx and Tx operation, oscillator and regulator), but without success.
Could someone provide suggestions on how to solve this issue? Is there a register or setting I might be overlooking to enable FIFO access? What could I be doing wrong?
Thank you in advance for your help!