FRS is designed to allow a sink to react quickly when the current source loses power. The source side advertises the FRS condition by pulling the active CC line low for a short, spec defined interval. This signaling is time critical and must be handled with very low latency.
As described inAN5225, the FRS signaling itself must be detected very quickly, typically within50 µs, and once detected, the sink prepares to take over the source role. The new source must then resume VBUS delivery within the timing defined by the FRS procedure (within150 µs), to avoid interrupting the connected device.
So those FETs are used to drive the CC lines to GND
Also in Figure 29. DRP with FRS VBUS = 5 V / 9 V / 15 V connections, the FRSTX1 and FRSTX2 fast role swap signals are wired to external MOSFETs to drive the CC lines.
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