STM32F4DISCOVERY DAC PA4/PA5 not reaching true 0V (shows ~0.045–0.05V)

[GORAKHNATH]

Hello ST Community,

My name is Gorakhnath. I am currently pursuing M.Tech (Power Electronics and Drives) at NIT Kurukshetra. I am using the STM32F4DISCOVERY (STM32F407VGT) board and I need stable DAC outputs for my hardware application.

What I need (requirement)
When the DAC command is 0 V, I need the output to be as close as possible to true 0.0000 V, because my external circuit maps:

• 0 V → 0 A

• 3 V → 50 A

Even a small voltage like 0.045–0.05 V produces unwanted current (~0.5 A) in my system.

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Issue / Observation

On both DAC pins:

• PA4 (DAC_OUT1)

• PA5 (DAC_OUT2)

I measure about:

• ~0.05 V (sometimes ~0.045 V) when the command is 0 V

This happens even when I am not sending any command from LabVIEW, or when I send 0,0.

---

What I tried (software checks)

1. Set DAC values to 0 using HAL on both channels:

• HAL_DAC_SetValue(..., 0) for DAC channel 1 and channel 2

1. Forced PA4/PA5 to GPIO output LOW when command is 0 V:

• Configured PA4/PA5 as GPIO_MODE_OUTPUT_PP and wrote RESET (hard clamp to 0 V)

1. Startup sequence:

• Start DAC at 0 first, then start USB CDC later (to avoid random outputs during USB init)

1. USB CDC receive parsing:

• Callback is connected correctly and I parse the command format from LabVIEW:
  "val1,val2\n" (float values), with clamping

Even after all of this, the output still does not reach 0.0000 V and I consistently see ~0.045–0.05 V.

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Questions to the community

1. Is ~0.05 V at DAC output a known/expected behavior for STM32F4 DAC or specifically on the STM32F4DISCOVERY board?

2. Is there any board-level hardware path (resistor/capacitor/audio circuit/pull-up or peripheral connection) on PA4 / PA5 that can cause a small offset or leakage at the header pin?

3. What is the best recommended method to guarantee a true 0 V level at the output for such a sensitive current-mapping circuit?

   • External pull-down resistor recommendation (e.g., 10k / 4.7k / 1k)?

   • Analog switch / transistor clamp method to force 0 V?

   • Any specific STM32F4DISCOVERY resistor/jumper/0Ω link that should be removed to isolate DAC pins from other circuitry?

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Attachments / References

• I will attach STM32F4DISCOVERY board photos (front/back, and close-up near PA4/PA5 routing)

• I will attach my STM32CubeIDE project and source files

• Code drive link:
  https://drive.google.com/drive/folders/1sN8W17vqVO0C64_aHqKQm7wwjeYXnULn?usp=sharing

Thank you for your time and support.

Kind regards,
Gorakhnath
M.Tech (Power Electronics and Drives), NIT Kurukshetra
Email: [e-mail]

[AScha.3]

Hi,

there is no "issue" , the DAC doing , what it should do; if you would read the ds, you could see:

 

And this you see , when DAC data = 0 .

> Is ~0.05 V at DAC output a known/expected behavior for STM32F4 DAC or specifically on the STM32F4DISCOVERY board?

As you could see from ds : yes.

> What is the best recommended method to guarantee a true 0 V level at the output for such a sensitive current-mapping circuit?

Many ways possible , but the obvious and probably most time used way to go :

your (analog) circuit needs to add some offset , so the DAC output is a little bit shifted;

maybe this : add some negative offset in the voltage -> current amp, so a DAC value of 100 giving zero current.

And same on top: a value for max.level is 4000 , not 4095 .

So you get a clean and predictable output from zero to max , with DAC values 100 to 4000.

And can adjust the offset also , to compensate drift etc.

[GORAKHNATH]

Thank you, AScha.3, for the clear explanation and for pointing me to the datasheet behavior. I understand now that ~0.05 V at DAC code 0 is expected, not a board fault. Your suggestion to use an offset (e.g., treat DAC code ~100 as “0 A”) and to limit the usable range (e.g., 100 to 4000) for a more predictable output is very helpful. I will implement this calibration in my voltage-to-current stage/mapping.

Kind regards,
Gorakhnath

[mayurharge]

DAC is behaving normally if possible modify the other board and ignore the values below 0.1 V or
add a PWM to voltage converter, here I am attaching the reference , adjust the gain to unity for stage 2 (simply replace 2.2k with 0R and remove 1k) 

if you need add a small RC filter at the output and use VCC as 5V and choose opamp part number with rail to rail output

 

 

 

[GORAKHNATH]

Thank you so much for sharing this circuit and explanation.
Now I understand your point clearly: instead of fighting the STM32 DAC offset near 0V, I can generate a stable analog control voltage using PWM and then convert it to DC with an RC filter and buffer/amplifier stages.

Your schematic and the way you explained the RC filter + LM358 buffer + gain stage is very helpful for my case, because my current control circuit is very sensitive near 0V. I really appreciate your time and support.

Kind regards,
Gorakhnath

[MHoll.2]

You have the Output Buffer enabled, so Yes the voltage is normal and can only be reduced by disabling the Output Buffer, but then You have to buffer the DAC output by yourself (DAC output impedance max. 15 kOhm!).

[GORAKHNATH]

Hi MHoll.2, thank you for the guidance. I tried forcing PA4/PA5 to GPIO low and also used external pull-down resistors, but the output still stays around ~0.045–0.05 V at “0 V command”.

Before I change my hardware or try another STM32 board, could you please confirm: if I disable the DAC output buffer (DAC_OUTPUTBUFFER_DISABLE) and then add my own external buffer op-amp, will it realistically allow the output to reach much closer to true 0 V on STM32F407?

Thanks again,
Gorakhnath