[STM32H750B-DK] Ethernet peripheral not responding - DMACSR reads 0 after all attempts

[ksale.1]

Hello everyone,

I've been working on getting Ethernet working on the STM32H750B-DK discovery board with TouchGFX and LwIP. After extensive debugging, I suspect a hardware issue and would appreciate your advice on confirming this.

What Works ✓

• TouchGFX display runs perfectly

• USART3 debug output works (Tera Term shows messages)

• PHY communication works (we get "Link established!")

The Problem ✗

The Ethernet MAC peripheral itself appears completely dead. We've tried:

1. Direct MDIO Access Works

• Successfully read PHY registers

• PHY responds and reports link up

• This proves MDIO/MDC pins are working

2. ETH Peripheral Shows No Life

 

ETH DMACSR after reset: 0x00000000
ETH DMACSR after system reset: 0x00000000

• Reading ETH->DMACSR always returns 0

• This register should never be 0 on a live peripheral

3. What We've Tried

Software attempts:

• Enabled all ETH clocks (__HAL_RCC_ETH1MAC_CLK_ENABLE() etc.)

• Forced and released peripheral reset

• Tried system-level reset via RCC (RCC_AHB1RSTR_ETH1MACRST)

• De-init and re-init with correct descriptors (0x30040000 etc.)

• Bypassed MX_LWIP_Init() completely

• Manual PHY configuration (gets link)

CubeMX configuration verified:

• ETH set to RMII mode

• All RMII pins correctly assigned (PA1, PA2, PA7, PC1, PC4, PC5, PG11, PG13, PG14)

• LAN8742 PHY selected

• Linker script has proper .lwip_sec section at 0x30040000

4. The Smoking Gun

ETH DMACSR after reset: 0x00000000
ETH still not responding - trying system reset
ETH DMACSR after system reset: 0x00000000
ETH HAL Init FAILED with error: 1

The DMACSR register should never read 0 on a working peripheral. Even with no link, it should return a non-zero value.

Questions for the Community

1. Is DMACSR = 0 definitive proof of dead hardware? What else could cause this?

2. Are there any jumpers or solder bridges on the STM32H750B-DK that need to be closed for Ethernet to work?

3. What should DMACSR read on a properly functioning STM32H750? (Even with no cable?)

4. Any way to verify if the ETH peripheral is getting power/clocks?

5. Could this be a faulty chip/board? The board is new and the display works perfectly.

6. Is there a factory demo that uses Ethernet I can flash to confirm hardware works?

What We See in Debug Output

Pre-RTOS: UART is working!
About to start RTOS...
LWIP task STARTING...
Manually configuring PHY...
Link established!
ETH power-up sequence...
All ETH clocks enabled
ETH reset released
ETH DMACSR after reset: 0x00000000
ETH still not responding - trying system reset
ETH DMACSR after system reset: 0x00000000
RxDesc: 0x30040000, TxDesc: 0x30040100, RxBuffLen: 1536
ETH HAL Init FAILED with error: 1
Setting up network interface...
IP set to: 192.168.1.110
Network interface is UP
Starting echo servers...
Heartbeat #0 - IP: 192.168.1.110

Any help would be greatly appreciated! I've spent days on this and suspect hardware failure, but want to be certain before replacing the board.

Board: STM32H750B-DK    DK32H760B$AT1
CubeMX Version: 6.16.0
TouchGFX Version: 4.26.0
Ethernet PHY: LAN8742 (onboard)

Thanks in advance!

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[Pavel A.]

What example project do you use for the ETH & LwIP? Is this one of ST provided examples or something else?

 

[ksale.1]

Please find attached the ioc,ld, and main.c files used to test the Ethernet

[Pavel A.]

If you have generated a project from scratch in CubeMX, it isn't guaranteed to work. Start from some ready example from the Projects subdir in the  Cube package, or from here.

 

[LCE]

I'm working with ETH on H723 .. H735 - I'm not 100% sure if ETH is the same as in H750.

 

Why should DMACSR not be == 0 if nothing has happened yet?

It's an interrupt status register.

My guess is that you mistook that one with the DMA software reset?

/* DMA Software Reset */
	/* set SWR bit: resets all MAC subsystem internal registers and logic
	 * 	NOTE: the SWR is not performed if the ETH_RX_CLK or the ETH_TX_CLK are
	 *			not available -> check external PHY or IO configuration
	 */
	ETH->DMAMR |= ETH_DMAMR_SWR;
	/* wait for software reset to reset... */
	u32TickStart = HAL_GetTick();
	while( (ETH->DMAMR & ETH_DMAMR_SWR) == ETH_DMAMR_SWR )
	{
		/* timeout ? */
		if( (HAL_GetTick()- u32TickStart ) > ETH_TIMEOUT_SWRESET_MS )
		{
			#if DEBUG_ETHNETIF_ERR
				uart_printf(SZC_TEXT_ERR "ETH_DMAMR_SWR software reset timeout\n\r");
			#endif 	/* DEBUG_ETHNETIF_ERR */

			return HAL_TIMEOUT;
		}
	}

 

Another thing:

Interesting that you can talk to the PHY before enabling the MAC clock, I thought the MDIO works with that clock.

[ksale.1]

Hello LCE, Pavel A,

First, thank you all for the incredible support so far. I've made significant progress based on your advice and would appreciate your guidance on the next steps.

What We've Done

Following the excellent suggestion about the RMII reference clock, I:

1. Configured MCO1 (PA8) to output 50MHz from PLL1Q with divider /5 (240MHz → 48MHz)

2. Verified PA8 is set as MCO1 in the pinout configuration

3. Confirmed the clock tree now shows 48MHz output on MCO1

The Current Result

Despite the clock configuration, the Ethernet MAC still shows no signs of life:

Pre-RTOS: UART is working!
About to start RTOS...
LWIP task STARTING...
Manually configuring PHY...
Pre-RTOS: UART is working!
About to start RTOS...
LWIP task STARTING...
Manually configuring PHY...
Link established!
ETH power-up sequence...
All ETH clocks enabled
ETH reset released
ETH DMACSR after reset: 0x00000000
ETH still not responding - trying system reset
ETH DMACSR after system reset: 0x00000000
RxDesc: 0x30040000, TxDesc: 0x30040100, RxBuffLen: 1536
ETH HAL Init FAILED with error: 1
Setting up network interface...
IP set to: 192.168.1.110
Network interface is UP
Starting echo servers...

The DMACSR register remains stubbornly at 0, indicating the MAC is not receiving any clock.

Key Observations

• :white_heavy_check_mark: PHY is alive - Link LED is on, and we successfully read PHY registers via MDIO

• :white_heavy_check_mark: MCO1 is configured - Clock tree shows 48MHz output

• :cross_mark: MAC is dead - DMACSR = 0, MACVR = 0, DMA software reset times out

Please advise.

 

[Pavel A.]

By the way have you seen this? https://www.linkedin.com/posts/tolylebedev_stm32-ethernet-explained-mac-phy-rmii-share-7434996521127022592-qdv5

 

[ksale.1]

Thank you, will do

[LCE]

> DMA software reset times out

Wait, you say you want to configure MCO to 50 MHz, but are happy with 48 MHz ?

If this is about RMII REF CLK between PHY and STM32: you must have 50 MHz, not only something close to that.

This clock can also be supplied by the LAN8742.
Check the 750-DK schematics if the PHY pin "nINT/REFCLKO" has a pull-up, and check with a scope what's going on there.

 

And STM32 internally, you should supply the ETH MAC with at least 100 MHz (not 100% sure though).

[ksale.1]

Given that the working example uses MII mode and my board is the same model, my board almost certainly uses MII mode with the PHY as clock master  (example in https://github.com/stm32-hotspot/STM32H7-LwIP-Examples/tree/main/STM32H750_Disco_ETH). This means:

My 48MHz MCO experiment was misguided (wrong frequency, wrong mode)

PA1 should be receiving 25MHz from PHY, not generating 50MHz

The DMACSR=0 issue is likely due to the descriptor address mismatch we already identified, not the clock

First, I'll fix the descriptor addresses as follows:

Setting Current Should Be

ETH Mode	RMII	MII
Rx Desc Address	0x30000100	0x30040000
Tx Desc Address	0x30000100	0x30040060
Rx Buffers Address	0x30000200	0x30040200
MCO1/PA8	Configured	Remove MCO1 config
Linker Script	Has .lwip_sec	Good as is

this is the most likely cause of DMACSR=0

Revert MCO1 configuration -

set PA8 back to default/TIM function

Test again

 

[LCE]

If the PHY is the LAN8742A as on most ST boards, it's surely an RMII interface.

[ksale.1]

Looking at the board schematics, it indicates MII mode:                                                                                                   

MII Signal STM32 Pin Status

ETH_TX_CLK	PC3	✓ Configured
ETH_TX_EN	PG11	✓ Configured
ETH_TXD0	PG13	✓ Configured
ETH_TXD1	PG12	✓ Configured
ETH_TXD2	PC2	✓ Configured
ETH_TXD3	PE2	✓ Configured
ETH_RX_CLK	PA1	✓ Configured
ETH_RX_DV	PA7	✓ Configured
ETH_RXD0	PC4	✓ Configured
ETH_RXD1	PC5	✓ Configured
ETH_RXD2	PB0	✓ Configured
ETH_RXD3	PB1	✓ Configured
ETH_CRS	PA0	✓ Configured
ETH_COL	PA3	✓ Configured
ETH_MDC	PC1	✓ Configured
ETH_MDIO	PA2	✓ Configured
ETH_RX_ER	PI10	✓ Configured