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bock
Visitor II
March 14, 2024
Solved

DMA 1Mbit/s Interprocessor Communication STM32H755

  • March 14, 2024
  • 1 reply
  • 2859 views

Hey everyone,

(code is attached to the post)

I'm currently working on a project and using the NUCLEO-H755ZI-Q development board.
A part of this project contains datahandling between the M7 und M4 Core. Therefore I read through a lot of documentation and tried out HSEM (which works great, but needs the CPU to handle, which is not optimal for my usecase) and DMA Handling with using the D3 sRAM Domain.

My problem seems to be, that I'm not able to generate an interrupt / callback on the other core (e.g. the M7 core handels data over DMA into the sRAM and a callback on the M7 ist thrown on completion. I'm able to debug as far, that I can see, that both the M7 und M4 can see the data correctly written into the RAM thanks to MPU configuration.)

What I need - or more like I think I need - is a way to generate an interrupt or callback on the M4, so I knows to get the new data and work with it. (and yes I future also the other way round from M4 to M7)
Maybe there is a better way to handel my problem - if so, please let me know.

Thanks you in advance for your time!

    This topic has been closed for replies.
    Best answer by TDK

    Yes. And ensure you are using proper cache management, or disabling it.

    After data is written, use SEV to tell the other processor to process that data.

     

    You shouldn't really need DMA to share data. Both chips can see (mostly) the same memory addresses. You can reserve a chunk for use by both cores for sharing data.

    1 reply

    T
    TDK
    Super User
    March 14, 2024

    Use the send event (SEV) instruction to send an event to the other core to trigger an interrupt.

    TDK_0-1710422921765.png

    https://www.st.com/resource/en/application_note/dm00771441-stm32h745755-and-stm32h747757-lines-interprocessor-communications-stmicroelectronics.pdf

     

    B
    bockAuthor
    Visitor II
    March 14, 2024

    Hey TDK,

    thank your for your quick response.

    Does that mean, that I use DMA as described and use SEV inside the DMA Callback to send an interrupt to the other core?

    kind regards, Bram

     

    T
    TDKAnswer
    Super User
    March 14, 2024

    Yes. And ensure you are using proper cache management, or disabling it.

    After data is written, use SEV to tell the other processor to process that data.

     

    You shouldn't really need DMA to share data. Both chips can see (mostly) the same memory addresses. You can reserve a chunk for use by both cores for sharing data.

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