possible ADC1 differential linearity error issue on NUCLEO-U575ZI-Q
Dear ST support team,
I'm facing an issue in reading ADC1 on a NUCLEO-U575ZI-Q evaluation board.
In some point of ADC1 range there is a huge gap between sampling points, Differential linearity error is around 25 LSB, clearly out of spec. This happens at spacing of about 500 points all along the input range.
See pictures below for a better view of the issue.
Some more details:
test on evaluation board NUCLEO-U575ZI-Q, NUCLEO575ZIQ$AT2, marking on microcontroller is "X"
STM32CubeIDE Version: 1.14.0 Build: 19471_20231121_1200 (UTC)
ADC is read in software trigger mode with ADC complete callback interrupt, tested different configuration, different resolution ( 14bit 12 bit ), clock, single ended or differential, oversampled or not, on different channel, but linearity error is always present.
Tested with VREF tied to 3V3 or with external reference without any difference.
Tested two different application code, one based from scratch application and one based on "ADC_SingleConversion_TriggerSW_IT" example, with same result
HAL_ADCEx_Calibration_Start makes no difference
Using ADC4 ( 12bit) gives no problem ( see picture )
The final implementation of the project will be on a STM32U595, which apparently has a different datasheet from the STM32U575, and I noticed that only after facing this problem.
As far as I can understand from the STM32U575 datasheet on the ADC characteristic, silicon rev X has some lower performance on ADC compared to the STM32U595, but still the Differential linearity error I'm measuring is way too big.
So question is: is this behaviour normal for this part on the evaluation board? If not, is there any advice on how to solve this issue?
Best regards,
Anton





