Problem configuring higher clock speeds for custom board using STM32F446RE with blinky code.

[Murph]

So i have been stuck on this problem for a while and I desperately need some help understanding what could be wrong. I am using STM32CubeIDE v1.8.0 and a NUCLEO STM32F446RE board to test some basic code that blinks an LED. This works absolutely fine. 

I have since built a custom breakout board for the STM32F446RE chip. For some reason, the exact same code that works just fine on the NUCLEO does not work when i configure higher clock speeds in Cube for the custom board. At around 80 MHz (the max being 180 MHz) the code seems to hard fault at random places in the code, and is different each attempt at debugging making it near impossible to figure out what the problem is. But lower speeds seem to run just fine. This makes me believe that my hardware must be lacking somehow. I have followed the datasheet as best as I could for recommended capacitors, voltages on pins, etc. See below for software and hardware details.

Software details: I am programming the custom board using SWD via the ST-Link v2. I have updated the firmware of the ST-Link v2 to the latest available. I have created a new project in Cube, configured PB14 as GPIO out for the LED, configured the pins for SWD, configured the clock, and added the following four lines of code to the main loop. 

HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, 1);

HAL_Delay(1000);

HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, 0);

HAL_Delay(1000); 

Hardware details: I am using the 3.3V and GND pins from the St-Link v2 for the power for the custom board. I have attached all VSS and VSSA pins to ground. I have attached all VDD and VBAT pins to 3.3V. I ran a 3.3V line to a ferrite bead, which then leads to VDDA. I added a 100 nF and 10 nF to ground for VDDA. I pulled BOOT0 low. I attached NRST to the RST from the St-Link v2 pin. I use a 4.7 uF capacitor for VCAP to ground. I added 2 x 100 nF decoupling capacitors from the 3.3V line to ground for each VDD pin on the chip (a total of 8 caps) and a 10uF capacitor.

I'm so confused why it works no problem on the Nucleo and not my custom breakout board. Any help would be greatly appreciated. Thanks! 

[TDK]

Sounds like incorrect wait states, or other invalid clock configuration.

[Murph]

Cube's auto generated code uses FLASH_LATENCY_5 in the SystemClock_Config function when i configure for max clock (180 MHz). Going by the datasheet which says that for 180 MHz, use 5 wait states and over-drive ON. I attached a screenshot of the clock config, in case you notice any problems with it.

[TDK]

Not real sure. What is the pedigree of the hardware? Reflow at an PCB assembly company or soldered in an at-home lab with substandard tools? Could be soldering problems. I don't see any issues with the clock setup.

What does an analysis of the hard fault codes show?

Edit: JW's idea of a limited current supply seems the most likely. Monitoring the rail with a scope would verify.

[waclawek.jan]

> I am using the 3.3V and GND pins from the St-Link v2 for the power for the custom board.

Is it capable to supply sufficient current?

Description otherwise sounds OK, post layout for us to discuss. Also check the connections for potential bad solder joints.

JW

[Murph]

I assume current wouldn't be a problem, since ultimately all the current is coming from a USB port on my laptop, just like with the Nucleo board which has no problems at all. I did continuity tests from the pins of the STM32 to my header pins which were fine, as well as continuity tests between adjacent pins to see if there was any shorting, but it was fine.

I attached a schematic I made of my setup on my breadboard.

[Murph]

Brining this up again in case anyone else would be able to help.

Does anyone have any other thoughts as to what would cause issues at higher clock speeds? I have tried my best to replicate the Nucleo's datasheet on my breadboard and custom PCB's, but still get random hardfaults back that lead me to believe its still a hardware problem.

I have upgraded my previous hardware setup described above with a 3.3V linear voltage regulator to supply the power for the processor. I was hoping my issues were related to the input power, but with the regulator, im not sure its the cause of my problems.

[Georgy Moshkin]

1) I do not see Vcap2 on your schematic. Put 2.2uF on both Vcap1 / Vcap2

2) Maybe your NUCLEO samples used HSE, and now you configured HSI

3) Need more details on " seems to hard fault at random places"

4) Also you can try remove the BEAD (if you don't have scope and can't check potential unwanted effect of erroneously chosen bead)

[BAli.1]

if someone is still looking for answers.. I had exact same issue on my custom board - could not able to set max clock (180 mhz using HSE + PLL or HSI + PLL), and lower clock freq settings were working but with random hardfaults. Root cause was the missing cap on vcap1 pin (pin 30 on stm32f446re).