Production flash tool for dual core STM32H745

[GHolc.1]

I am releasing my first product using a dual core STM32H745.  Our board manufacturer is using Segger J-Flash to load our application hex files.  The process for flashing our released firmware is to load a Segger project setup for the M4 core and our supplied hex file for the M4 core and program that memory address range.  Then repeat with a Segger M7 core project and our supplied M7 core hex file.

Problem is that frequently I get a board that has only one core programmed which of course makes the board not fully functional.  Am I going about this the hard way?  Is it normal to combine the M4 core hex file and M7 core hex fie outputs into one and program the flash memory with a combined single pass?  Or is programming a dual core just a two step process and this will get better after we have built some more of them?  My compiler is IAR if that makes any difference.

[mƎALLEm]

Hello,

See https://developer.arm.com/documentation/ka004500/latest/ which then points to

https://sourceforge.net/projects/srecord/files/srecord-win32/

It seems they use an utility called srec_cat.exe

Example: srec_cat.exe HexFile1.hex -Intel HexFile2.hex -Intel -o MergedHexFile.hex -Intel

[Tesla DeLorean]

The cores share a common FLASH, with the code for each core starting at a different address.

>>Am I going about this the hard way?

Yes, you'd typically combine the .HEX files, the format isn't particularly complicated and is well documented.

You could write a script or app to do it, or manually merge, typically by losing the terminal record in the first file.

For a cheaper/scalable solution you might consider using a NUCLEO or DISCO board to program a golden image via the USART and System Boot Loader, ie see AN3155 and AN2606

[GHolc.1]

Thanks @Tesla DeLorean, combined seems to be working fine.  The Segger software forces you to pick the target core, and the M7 selection has the M4 flash range disabled by default.  But after you go into options -> project settings -> flash, pick both flash banks and uncheck disable flash bank this addresses my concern.

I put @mƎALLEm command into IAR as a post build step and the output file generation is automatic.

[mƎALLEm]

Did you test srec_cat.exe utility on IAR and worked fine?