STM32F103C8 production board schematic

[lk.dgironi]

I'm working on a board design with a STM32F103C8. First time for me to build a PCB with STM32, I've always worked with "blue pill" boards.

Not sure about BOOT wiring. The firmware will be uploaded using STM32CubeProgrammer. The board should startup using the internal firmware.

Only HSE External Crystal is used, 8Mhz.

PROG connect is used for programming/debugging.

Can you confirm this design will work? Thanks!

Note: first post here, so excuse me if I'm doing wrong.

[Peter BENSCH]

Welcome, @Davide G_Oironi​, to the community!

• C2, C3 seems to be a bit large, check AN2867 for correct values for your crystal
• R10 should not be necessary
• add a 100nF capacitor between NRST and GND
• R9 is also not required

Good luck!

Regards

/Peter

[TDK]

You should have a bulk 4.7uF capacitor on VDD somewhere.

Don't be afraid to use multiple GND and +3V3 symbols on your schematic to increase readability.

[lk.dgironi]

Thank you

@Peter BENSCH​ 

1)

According to AN2867 if I'm right I should apply the 3.3 Load Capacitance formula

Supposing Cs 5pF, which I think is a common value for "standard" PCB, my oscillator should have by datasheet 20pF Load Capacitance, so (Cl1*Cl2)/(Cl1+Cl2)=20pF-5pF and Cl1==Cl2 => Cl1,Cl2=30pF

Does it sound right?

2)

Thank's to you I've look at the datasheet, the NRST already has a RPU resistor, so R9 could be removed

3)

done

4)

I've fond R10 in other schematics, never seen that on my AVR experience, I've to investigate why others (in blue pill for example) use this resistor

@TDK​ 

Yes, I've a 10uF on the supply sheet.

You are right, readability is not that much with that few VDD and GND points.

Find schematic updated attached

[Peter BENSCH]

The feeback resistor was used in the last century in oscillator circuits that did not have an internal one. However, the STM32s have had this feedback resistor built in since the STM32s era began in 2007.

Why it was used in the Blue Pill... only its developers know.

[lk.dgironi]

only its developers know :face_with_tears_of_joy: that's right :)

Thank you again.

About the 1) formula, is that right for a 20pF Load Capacitance? By the way the oscillator is a Fundamental one like specified in the AN2867 paper.

[Peter BENSCH]

1: yes, 30pF sounds reasonable if CL is actually 20pF (didn't expect a crystal with such a huge load capacitance). 4..5pF for CS are quite common values.

Good luck!

/Peter

[lk.dgironi]

edit:

~ the schematic of this reply is not correct ~

[Peter BENSCH]

Please open the shortcut from NRST to VDD.

[lk.dgironi]

Done below

[lk.dgironi]

Solved.

Schematic attached.

[Peter BENSCH]

Now it looks ok.

Regards

/Peter

[Piranha]

Take a note that on 2 layer boards the stray capacitance is significantly smaller than on 4 or more layer boards. My experience says that on 2 layer boards with short routes to crystal the Cs is typically only 1-2 pF.

We measured such a board with a crystal CL = 12 pF and tried a few capacitor values. Here are the resulting LSE frequency offsets relative to an external precision reference clock:

15 pF: +25 ppm
18 pF: +15 ppm
22 pF: +1,6 ppm

Indirectly it shows that a stray capacitance should be Cs = (2 * 12 pF - 22 pF) / 2 = 1 pF.

[lk.dgironi]

Thanks! Indeed I'm using a 2 layer board.

[lk.dgironi]

Quick update: design is loaded on PCB, I confirm it's working.