Hello,
I am starting a project using this eval board.
I need to route octo-spi flash and ram (like on the eval board).
Do you have information about the stackup used ?
Altium files give me a stackup but I find it a bit weird :
Cu1 is 42µm / D1 is core 100µm
Cu2 is 35µm / D2 is prepeg 100µm
Cu3 is 35µm / D3 946µm core
Cu4 is 35µm / D4 is 100µm prepeg
Cu6 42µm
Flash and Ram tracks impedance are not 50ohms using those parameters.
W (tracks width is 120µm).
Regards,
Dli
At least some ST evaluation boards are good examples that things are working even with sub-optimal layout. :D
If you have some PCB layout experience, forget about their specific board stack.
If not:
- check your PCB supplier's standard multi-layer stacks and use these (I really like 6-layer boards, with 2 GND-planes, 1 underneath top and bottom each)
- make sure to have an unbroken GND plane underneath all high speed tracks
- keep trace lengths roughly equal (with +-2 mm you should be good at 100 MHz)
- impedance... keep the lines as short as possible, and "somewhere around 50R", more important keep it equal between the signals
- use serial resistors on all lines (as ST does on the DK)
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