STM32H757I EVAL Board with B_LCDAD_HDMI1

[MechaTroniker]

Hello community, I am using the STM32H757 development board along with the DSI-to-HDMI adapter board and would like to generate a resolution of 1080p via an HDMI interface. The adapter board supports this resolution at a refresh rate of 30 Hz. However, I have only been able to achieve a maximum resolution of 1600 x 900 at a refresh rate of 25 Hz and a pixel clock of 40 MHz. I am aware that the DSI bandwidth is limited to 1 Gbit/s per lane, but with two lanes, this shouldn't be an issue, right? Perhaps someone could also explain to me the relationship between the Pixel Clock (To LTDC), Lane Clock (To DSI lane byte), and Escape Clock (To DSI txclkesc). Thank you to everyone who can assist me.

[CYANG.1]

Hi 

According to STM32H757 datasheet (DS12931), on page 41, Video mode interface feature. Number of lanes is 2, Maximum speed per lane is 1Gbps. If you used B-LCDAD-HDMI1 as adaptor board, the bridge chip  ADV7533 can only support 800Mb/s. According to ADV7533 program guide, 1920x1080p@30Hz needs 3 lanes. In this case, for 2 lanes, the adaptor board can only support such as 720x480p@60Hz(24/30bit), 720x576@50Hz(24/30bit), 1024x768@60Hz(24bit), etc.