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March 31, 2025
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STM32L4P5G-DK OSPI speed gets too slow at ClockPrescaler = 0;

  • March 31, 2025
  • 1 reply
  • 432 views

Hello,

 

I set 120MHz to OCTOSPI for Octo-SPI PSRAM. With the ClockPrescaler 0x02, the PSRAM test takes several seconds. However, with the ClockPrescaler 0x00, it takes over 3 minutes. Does it mean any problem on the clock configuration of STM32CubeIDE? The .ioc file is attached.

 

Thanks.

uint8_t BSP_PSRAM_Init(void)
{
OSPIM_CfgTypeDef OSPIM_Cfg_Struct;
OSPI_RegularCmdTypeDef sCommand = {0};
uint8_t reg[2];

if (bsp_psram_initialized == 0)
{

PSRAM_MspInit();

OSPIM_Cfg_Struct.ClkPort = 1;
OSPIM_Cfg_Struct.DQSPort = 1;
OSPIM_Cfg_Struct.IOHighPort = HAL_OSPIM_IOPORT_1_HIGH;
OSPIM_Cfg_Struct.IOLowPort = HAL_OSPIM_IOPORT_1_LOW;
OSPIM_Cfg_Struct.NCSPort = 1;

OSPIM_Cfg_Struct.Req2AckTime = 1;

OSPIPSRAMHandle.Instance = OCTOSPI1;
HAL_OSPI_DeInit(&OSPIPSRAMHandle);

OSPIPSRAMHandle.Init.FifoThreshold = 2;
OSPIPSRAMHandle.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
OSPIPSRAMHandle.Init.MemoryType = HAL_OSPI_MEMTYPE_APMEMORY;
OSPIPSRAMHandle.Init.DeviceSize = 23; /* 64 MBits */
OSPIPSRAMHandle.Init.ChipSelectHighTime = 1;
OSPIPSRAMHandle.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE;
OSPIPSRAMHandle.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0;
OSPIPSRAMHandle.Init.ClockPrescaler = 0x02;
OSPIPSRAMHandle.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE;
OSPIPSRAMHandle.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE;
OSPIPSRAMHandle.Init.ChipSelectBoundary = 4;
OSPIPSRAMHandle.Init.DelayBlockBypass = HAL_OSPI_DELAY_BLOCK_USED;
OSPIPSRAMHandle.Init.MaxTran = 0;

if (HAL_OSPIM_Config(&OSPIPSRAMHandle, &OSPIM_Cfg_Struct, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return PSRAM_ERROR;
}

if (HAL_OSPI_Init(&OSPIPSRAMHandle) != HAL_OK) {
return PSRAM_ERROR;
}

sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG;
sCommand.FlashId = HAL_OSPI_FLASH_ID_1;
sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES;
sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE;
sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES;
sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS;
sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE;
sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = HAL_OSPI_DATA_8_LINES;
sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE;
sCommand.DQSMode = HAL_OSPI_DQS_ENABLE;
sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;
sCommand.Instruction = READ_REG_CMD_SRAM;
sCommand.Address = 0;
sCommand.NbData = 2;
sCommand.DummyCycles = 5;

if (HAL_OSPI_Command(&OSPIPSRAMHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
return PSRAM_ERROR;
}

if (HAL_OSPI_Receive(&OSPIPSRAMHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
return PSRAM_ERROR;
}

sCommand.Instruction = WRITE_REG_CMD_SRAM;
sCommand.DummyCycles = 0;
MODIFY_REG(reg[0], 0x03, 0x00);

if (HAL_OSPI_Command(&OSPIPSRAMHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
return PSRAM_ERROR;
}

if (HAL_OSPI_Transmit(&OSPIPSRAMHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
return PSRAM_ERROR;
}

bsp_psram_initialized = 1;
}

return PSRAM_OK;
}

    This topic has been closed for replies.
    Best answer by KDJEM.1

    Hello @JKim.2,

     

    Please use </> button to share your code. See this post.

     

    Could you please check the maximum OCTOSPI frequency. I recommend you to look at Overall FAQs for QUADSPI/OCTOSPI/HSPI/XSPI and precisely "1.2. The maximum frequency" sub-section 

    For STM32L4P5, the maximum OCTOSPI frequency is 92 MHz (not 120 MHz) that can be achieved with some conditions mentioned in the datasheet 6.3.29 OCTOSPI characteristics.

    KDJEM1_0-1744188590641.png

    KDJEM1_1-1744188607511.png

    The Reference manual detailed the "Bits 7:0 PRESCALER[7:0]: Clock prescaler". This field must be between 0 and 255 and defines the scaler factor for generating the CLK based on the kernel clock (value + 1). 

    If the clock prescaler is set to 0, this means the clock on the bus is 120MHz / 1 = 120MHz > 90MHz.

    If the clock prescaler is set to 2, this means the clock on the bus is 120MHz / 3 = 40MHz < 90MHz.

    Please see this post "Solved: Re: How to enable QSPI PSRAM as data memory - STMicroelectronics Community"

    For STM32L4P5G-DK examples, you can refer to AN5050 precisely section "7 OCTOSPI application examples" and section "I. Octo-SPI PSRAM in Regular-command protocol example". These sections provides some typical OCTOSPI implementation examples with STM32L4P5xx/Q5xx products, and STM32CubeMX examples using the STM32L4P5G-DK Discovery kit for the STM32L4P5AGI6PU microcontroller.

    KDJEM1_2-1744188873435.png

    Thank you.

    Kaouthar

     

    1 reply

    KDJEM.1Answer
    Technical Moderator
    April 9, 2025

    Hello @JKim.2,

     

    Please use </> button to share your code. See this post.

     

    Could you please check the maximum OCTOSPI frequency. I recommend you to look at Overall FAQs for QUADSPI/OCTOSPI/HSPI/XSPI and precisely "1.2. The maximum frequency" sub-section 

    For STM32L4P5, the maximum OCTOSPI frequency is 92 MHz (not 120 MHz) that can be achieved with some conditions mentioned in the datasheet 6.3.29 OCTOSPI characteristics.

    KDJEM1_0-1744188590641.png

    KDJEM1_1-1744188607511.png

    The Reference manual detailed the "Bits 7:0 PRESCALER[7:0]: Clock prescaler". This field must be between 0 and 255 and defines the scaler factor for generating the CLK based on the kernel clock (value + 1). 

    If the clock prescaler is set to 0, this means the clock on the bus is 120MHz / 1 = 120MHz > 90MHz.

    If the clock prescaler is set to 2, this means the clock on the bus is 120MHz / 3 = 40MHz < 90MHz.

    Please see this post "Solved: Re: How to enable QSPI PSRAM as data memory - STMicroelectronics Community"

    For STM32L4P5G-DK examples, you can refer to AN5050 precisely section "7 OCTOSPI application examples" and section "I. Octo-SPI PSRAM in Regular-command protocol example". These sections provides some typical OCTOSPI implementation examples with STM32L4P5xx/Q5xx products, and STM32CubeMX examples using the STM32L4P5G-DK Discovery kit for the STM32L4P5AGI6PU microcontroller.

    KDJEM1_2-1744188873435.png

    Thank you.

    Kaouthar