SWD or JTAG: How Does Recently-Birthed Target Know Which?
I'm posting here because STM32CUBEProgrammer announces it cannot find my Rev.2 target board. More puzzling is that it finds my Rev. 1 target just fine.
I made these design changes between Rev. 1 and Rev.2 target boards:
--I boosted the voltage on my VDD rail to +3.05V to account for the fact that the STLINKV3SET programmer doesn't do VDD voltages below 3V. The STLINKV2 programmer I used with Rev. 1 target boards was fine with my earlier VDD=2.8VDC.
--I added signals to my already-crowded TagConnect programming header to permit the use of STM's older SWD programming interface. For safety, I left in place some of the JTAG pins.
The older SWD interface requires fewer signals, allowing me to add the COM port signals that the STLINKV3SET programmer offers. Calibration of our end product could be done using the COM port signals embedded in the TagConnect header.
So how does the STLINKV3SET programmer "inform" a freshly-birthed target board that the SWD programming regime will be used rather than the JTAG regime?
If both SWD and JTAG signals are implemented between an STLINK programmer and target board, can a new target board be confused about this matter, prompting STM32CUBEProgrammer to shout "target not found"?
Does the STM interface use signal voltages that fall outside of the normal VSS-->VDD bounds? I ask because my analog 'scope tells me this is occurring on some SWD pins.
Thanks for any feedback that you might have on this topic.
Jim in Indianapolis US
