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R
RMand
Explorer II
October 24, 2023
Solved

Unable to use HSPI + OctoSPI to talk to PSRAM + NOR-FLASH (respectively)

  • October 24, 2023
  • 6 replies
  • 9710 views

I am trying to bring up the STM32U5A9J-DK wherein I can use the external NOR_FLASH over OctoSPI_1 and the external PSRAM over HSPI_1 -- both in memory mapped mode. I am trying to use the STM32CubeMX to generate the drivers but am having some difficulties.

I have tried using the 'default' configuration suggested by the CubeMX IDE and have also tried , unsuccessfully, to tweak some of the GPIO setttings. Bottom line, no matter what I do, the IDE always insists that the Data pins in the OCTOSPI1 are in conflict with a whole host of other functions -- But I don't think they are because the Alternate Functions are set up correctly.

So why in blazes is the CubeMX saying that there is a conflict? NOTHING MAKES SENSE HERE.

I have attached a screenshot of the IDE showing the conflicts. Thanks for any help.

I am attaching a screen shot of the IDE where I see the conflict.

      This topic has been closed for replies.
      Best answer by Alex - APMemory

      Hi, 

      APMemory PN with "XX' (like APS512XXN-OBR or APS256XX-OBR) are supporting both OPI & HPI mode. The device is booting in x8 and can be swap to x16 by mode register. The command you mentioned are setting the configuration on the MCU side.

      The benefit of using HPI x16 mode are following:

      1. Double the bandwidth versus OPI, up to 1Gbps and provide a pin count, power, and a very competitive advantage compared to SDRAMx32 (512Mb SDRAM x32 price example; 512Mb HPI price example)
      2. An other advantage of HPI versus OPI is active power, for the same amount of data tranfert, you can run HPI half of the time and consume much less power, spending more time in standby. https://www.st.com/en/partner-products-and-services/iot-ram-hpi-opi-psram.html

      Below are illustrations of pin count & power benefit of OPI versus SDRAMx16 & HPI versus SDRAMx32

      AlexAPMemory_0-1700594139436.pngAlexAPMemory_1-1700594177125.png

      Hope this help

      Alex

      6 replies

      Q
      QSHAO.1
      ST Employee
      October 24, 2023

      Hi, what tweak of IOs setting you implemented? I may have a try to see if it's easy to reproduce this issue. thanks!

      R
      RMandAuthor
      Explorer II
      October 24, 2023

      Hi

      Thanks for the follow up. I have no idea where to begin my response to your specific question. If you take a look at the attached screen shot you will notice that all data pins of the OCTOSPI1 are shown in YELLOW.  It is not clear to me if this is just a 'notification' or that it will actually cause operational errors.

      • My fundamental question is: Has anybody actually got the HSPI working with the specific PSRAM populated on the  'STM32U5A9J-DK' board in memory-mapped mode with an x16 bus width -- I have not seen any proof (i.e. examples, projects, etc.) that it has been demonstrated anywhere other than a claim in the documentation that it is 'supposed to work'.
      • The PSRAM included in the Design Kit is an x8 Serial PSRAM and I can only assume that the system will have to be set up to use the double transfer rate to achieve the x16 transfer. In this case, do I configure the HSPI as a single x16 or as dual-x8?

      Thanks for your help again.

       

      Q
      QSHAO.1
      ST Employee
      October 25, 2023

      Hi, I tried to create a CubeMX project based on STM32U5A9J-DK board. and both OSPI and HSPI IOs configuration by default is NO conflict. I may find my screen shot attached. so there is no IO configuration conflict issue in my side.

      Would you try to install last version of CubeMX and try this approach in your side?

       

      R
      RMandAuthor
      Explorer II
      October 25, 2023

      Maybe it is my misunderstanding -- but your image also highlights the IO data lines in YELLOW.

      Are you saying that the yellow highlight is acceptable i.e. NOT A CONFLICT?

      F
      FBL
      Technical Moderator
      October 24, 2023

      Hello @RMand 

      According to the screenshot you have shared, the GPIO settings are not inline with default configuration in STM32U5A9J-DK. You can refer to schematics for details. Also, you are missing some parameters in the settings.

      We suggest you the following project. It shows how to erase, write and read data on HSPI configured as a single x16 STM32Cube\Repository\STM32Cube_FW_U5_V1.3.0\Projects\STM32U5x9J-DK\Examples\BSP

      R
      RMandAuthor
      Explorer II
      October 24, 2023

      Hi @FBL 

      I am attaching a newly created configuration generated by CubeMX when I select the 'STM32U5A9J-DK' board. If you load it up in your local install of CubeMX you will see that the default configuration also shows the 8 data lines of OSPI1 as 'in conflict'...... 

      The web GUI does not allow me to upload the .ioc file so I am trying it now with a .txt extension.

       

      R
      RMandAuthor
      Explorer II
      October 24, 2023

      And thanks for the pointer to the example -- I will review it now.

      Q
      QSHAO.1
      ST Employee
      October 27, 2023

      Yes, the yellow highlight is acceptable and I confirm the OctoSPI IO configuration in the IOC file of STM32U5 DK is correct. thanks! 

      A
      Alex - APMemory
      Explorer
      November 16, 2023

      Did you find out the issue? I can confirm STM32U5x9J-DK is supporting 512Mb HPI IoT RAM APS512XXN-OBR (and 256Mb APS256XXN-OBR), without any issue. 

      Alex

      R
      RMandAuthor
      Explorer II
      November 20, 2023

      Hi Alex,

      Yes, I was able to get past this issue. For reasons that I cannot explain, the IOC file mapped the IO7 line to the wrong GPIO and it was a nightmare tracking it down. Once I got that resolved things are looking a lot more rosy now.

      Thanks for following up on this issue.

      Cheers

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