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Visitor II
October 14, 2020
Question

Why I cannot make the I/O lines endure (correct) logic levels

  • October 14, 2020
  • 6 replies
  • 1544 views

Having designed successfully uC Embedded industrial designs since late '70s, I am confused why I cannot make ANY STM32xyyy design without the following problem: A few seconds/minutes after applying power, one ore more I/O lines begin to fluctuate at analog levels, and it becomes worse as time lapses. Few hours of rest often helps for some seconds. Funny thing is neighboring I/O pin may start to follow other pins logic levels. To focus problem, I have made pcb's with minimal design - just 4 LEDs blinking from Port PB03-PB06. Same problem! Can anyone HELP ME ?!!!!

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    6 replies

    Super User
    October 14, 2020

    Sounds like a hardware layout issue. Is your power supply to the chip stable? Can you show a schematic? Which chip?

    rolfmyhreAuthor
    Visitor II
    October 14, 2020

    To TDK (or whoever can assist). I could have given you about 20 different designs, including linear Volt.Reg, and other MCU's from STM - they all operates like this. Strangely enough 1 out of 6/7 actually DO work!

    Super User
    October 14, 2020

    > A few seconds/minutes after applying power, one ore more I/O lines begin to fluctuate at analog levels,

    Quantify.

    It would be interesting also if you could test a "known good" board such as Nucleo or Disco.

    JW

    rolfmyhreAuthor
    Visitor II
    October 14, 2020

    I have successfully used around 10 different Nucleo Boards

    Super User
    October 14, 2020

    Does this mean the problem does not occur on the Nucleo boards?

    As I've asked you above, tell us exactly what are your finding and hiw are they different from your expectations.

    JW

    Super User
    October 15, 2020

    The schematic seems fine. They symptoms you describe don't really make sense to me.

    > To focus problem, I have made pcb's with minimal design - just 4 LEDs blinking from Port PB03-PB06. Same problem!

    There are not glaring hardware issues in the chips. The GPIO behavior is simple and governed by registers. I/O pins "beginning to fluctuate at analog levels" isn't something that anyone else is reporting on the forums.

    I agree that you could better define the behavior you're seeing. Your descriptions are a bit all over the place. "Funny thing is neighboring I/O pin may start to follow other pins logic levels." Again, not something other people are experiencing and reporting.

    The fact that you see issues in custom boards and not with Nucleo boards suggests the STM32 chip isn't the problem.